nb/intel/e7505: Hook up PCI domain and CPU ops to devicetree
[coreboot.git] / src / mainboard / aopen / dxplplusu / devicetree.cb
blobdf99751c33520960b46fe611efa433fb1048cca8
1 ## SPDX-License-Identifier: GPL-2.0-only
3 chip northbridge/intel/e7505
5 device cpu_cluster 0 on
6 ops e7505_cpu_bus_ops
7 end
9 device domain 0 on
10 ops e7505_pci_domain_ops
11 device pci 0.0 on end # Chipset host controller
12 device pci 0.1 on end # Host RASUM controller
13 device pci 2.0 on # Hub interface B
14 chip southbridge/intel/i82870 # P64H2
15 device pci 1c.0 on end # IOAPIC - bus B
16 device pci 1d.0 on end # Hub to PCI-B bridge
17 device pci 1e.0 on end # IOAPIC - bus A
18 device pci 1f.0 on end # Hub to PCI-A bridge
19 end
20 end
21 device pci 4.0 off end # (undocumented)
22 device pci 6.0 off end # (undocumented)
23 chip southbridge/intel/i82801dx
24 device pci 1d.0 on end # USB UHCI
25 device pci 1d.1 on end # USB UHCI
26 device pci 1d.2 on end # USB UHCI
27 device pci 1d.7 on end # USB EHCI
28 device pci 1e.0 on # Hub to PCI bridge
29 device pci 2.0 off end
30 end
31 device pci 1f.0 on # LPC bridge
32 chip superio/smsc/lpc47m10x
33 device pnp 2e.0 off # Floppy
34 io 0x60 = 0x3f0
35 irq 0x70 = 6
36 drq 0x74 = 2
37 end
38 device pnp 2e.3 off # Parallel Port
39 io 0x60 = 0x378
40 irq 0x70 = 7
41 end
42 device pnp 2e.4 on # Com1
43 io 0x60 = 0x3f8
44 irq 0x70 = 4
45 end
46 device pnp 2e.5 on # Com2
47 io 0x60 = 0x2f8
48 irq 0x70 = 3
49 end
50 device pnp 2e.7 off # Keyboard
51 io 0x60 = 0x60
52 io 0x62 = 0x64
53 irq 0x70 = 1 # Keyboard interrupt
54 irq 0x72 = 12 # Mouse interrupt
55 end
56 device pnp 2e.a on # ACPI
57 io 0x60 = 0x0e00
58 end
59 end
60 end
61 device pci 1f.1 on end # IDE
62 register "ide0_enable" = "1"
63 register "ide1_enable" = "1"
64 device pci 1f.3 on end # SMBus
65 device pci 1f.5 on end # AC97 Audio
66 device pci 1f.6 off end # AC97 Modem
67 end # SB
68 end # PCI domain
69 end