soc/intel/pantherlake: Refactor FSP-M params for debug message control
[coreboot.git] / spd / 
treef27693f7c0a0b9c4c98b555765ca21928124845a
drwxr-xr-x   ..
drwxr-xr-x - ddr4
drwxr-xr-x - lp4x
drwxr-xr-x - lp5