cpu/intel: Add socket types
[coreboot2.git] / src / ec / 51nb / npce985la0dx / npce985la0dx.c
blobd81ea9093219eda46a930a1622d009aaffa2a855
1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 #include <device/pnp.h>
5 /*
6 * This embedded controller looks awfully like a Super I/O chip. LDNs 5 and 6
7 * need to be enabled to turn on the keyboard and mouse controller, and LDN
8 * 0x11 needs to be enabled to turn on ACPI embedded controller functionality.
9 */
10 static struct pnp_info dev_infos[] = {
11 { NULL, 0x05 }, { NULL, 0x06 }, { NULL, 0x11 }
14 static void ec_51nb_npce985la0dx_ops_enable(struct device *dev)
16 pnp_enable_devices(dev, &pnp_ops, ARRAY_SIZE(dev_infos), dev_infos);
19 struct chip_operations ec_51nb_npce985la0dx_ops = {
20 .name = "51NB EC",
21 .enable_dev = ec_51nb_npce985la0dx_ops_enable,