lib/smbios: Improve Type9
[coreboot2.git] / src / drivers / intel / fsp1_1 / raminit.c
blob247df04fdd077fb10e9994147831f5babb563646
1 /* SPDX-License-Identifier: GPL-2.0-only */
3 #include <acpi/acpi.h>
4 #include <cbmem.h>
5 #include <cf9_reset.h>
6 #include <commonlib/helpers.h>
7 #include <console/console.h>
8 #include <cpu/x86/smm.h>
9 #include <fsp/romstage.h>
10 #include <fsp/util.h>
11 #include <string.h>
12 #include <timestamp.h>
14 void raminit(struct romstage_params *params)
16 const bool s3wake = params->power_state->prev_sleep_state == ACPI_S3;
17 const EFI_GUID bootldr_tolum_guid = FSP_BOOTLOADER_TOLUM_HOB_GUID;
18 EFI_HOB_RESOURCE_DESCRIPTOR *cbmem_root;
19 FSP_INFO_HEADER *fsp_header;
20 EFI_HOB_RESOURCE_DESCRIPTOR *fsp_memory;
21 FSP_MEMORY_INIT fsp_memory_init;
22 FSP_MEMORY_INIT_PARAMS fsp_memory_init_params;
23 const EFI_GUID fsp_reserved_guid =
24 FSP_RESERVED_MEMORY_RESOURCE_HOB_GUID;
25 void *fsp_reserved_memory_area;
26 FSP_INIT_RT_COMMON_BUFFER fsp_rt_common_buffer;
27 void *hob_list_ptr;
28 FSP_SMBIOS_MEMORY_INFO *memory_info_hob;
29 const EFI_GUID memory_info_hob_guid = FSP_SMBIOS_MEMORY_INFO_GUID;
30 MEMORY_INIT_UPD memory_init_params;
31 const EFI_GUID mrc_guid = FSP_NON_VOLATILE_STORAGE_HOB_GUID;
32 u32 *mrc_hob;
33 u32 fsp_reserved_bytes;
34 MEMORY_INIT_UPD *original_params;
35 EFI_STATUS status;
36 VPD_DATA_REGION *vpd_ptr;
37 UPD_DATA_REGION *upd_ptr;
38 int fsp_verification_failure = 0;
39 EFI_PEI_HOB_POINTERS hob_ptr;
40 uintptr_t smm_base;
41 size_t smm_size;
44 * Find and copy the UPD region to the stack so the platform can modify
45 * the settings if needed. Modifications to the UPD buffer are done in
46 * the platform callback code. The platform callback code is also
47 * responsible for assigning the UpdDataRngPtr to this buffer if any
48 * updates are made. The default state is to leave the UpdDataRngPtr
49 * set to NULL. This indicates that the FSP code will use the UPD
50 * region in the FSP binary.
52 post_code(POSTCODE_MEM_PREINIT_PREP_START);
53 fsp_header = params->chipset_context;
54 vpd_ptr = (VPD_DATA_REGION *)(fsp_header->CfgRegionOffset +
55 fsp_header->ImageBase);
56 printk(BIOS_DEBUG, "VPD Data: %p\n", vpd_ptr);
57 upd_ptr = (UPD_DATA_REGION *)(vpd_ptr->PcdUpdRegionOffset +
58 fsp_header->ImageBase);
59 printk(BIOS_DEBUG, "UPD Data: %p\n", upd_ptr);
60 original_params = (void *)((u8 *)upd_ptr +
61 upd_ptr->MemoryInitUpdOffset);
62 memcpy(&memory_init_params, original_params,
63 sizeof(memory_init_params));
65 /* Zero fill RT Buffer data and start populating fields. */
66 memset(&fsp_rt_common_buffer, 0, sizeof(fsp_rt_common_buffer));
67 if (s3wake) {
68 fsp_rt_common_buffer.BootMode = BOOT_ON_S3_RESUME;
69 } else if (params->saved_data != NULL) {
70 fsp_rt_common_buffer.BootMode =
71 BOOT_ASSUMING_NO_CONFIGURATION_CHANGES;
72 } else {
73 fsp_rt_common_buffer.BootMode = BOOT_WITH_FULL_CONFIGURATION;
75 fsp_rt_common_buffer.UpdDataRgnPtr = &memory_init_params;
76 fsp_rt_common_buffer.BootLoaderTolumSize = cbmem_overhead_size();
78 /* Get any board specific changes */
79 fsp_memory_init_params.NvsBufferPtr = (void *)params->saved_data;
80 fsp_memory_init_params.RtBufferPtr = &fsp_rt_common_buffer;
81 fsp_memory_init_params.HobListPtr = &hob_list_ptr;
83 /* Update the UPD data */
84 soc_memory_init_params(params, &memory_init_params);
85 mainboard_memory_init_params(params, &memory_init_params);
87 if (CONFIG(MMA))
88 setup_mma(&memory_init_params);
90 post_code(POSTCODE_MEM_PREINIT_PREP_END);
92 /* Display the UPD data */
93 if (CONFIG(DISPLAY_UPD_DATA))
94 soc_display_memory_init_params(original_params,
95 &memory_init_params);
97 /* Call FspMemoryInit to initialize RAM */
98 fsp_memory_init = (FSP_MEMORY_INIT)(fsp_header->ImageBase
99 + fsp_header->FspMemoryInitEntryOffset);
100 printk(BIOS_DEBUG, "Calling FspMemoryInit: %p\n", fsp_memory_init);
101 printk(BIOS_SPEW, " %p: NvsBufferPtr\n",
102 fsp_memory_init_params.NvsBufferPtr);
103 printk(BIOS_SPEW, " %p: RtBufferPtr\n",
104 fsp_memory_init_params.RtBufferPtr);
105 printk(BIOS_SPEW, " %p: HobListPtr\n",
106 fsp_memory_init_params.HobListPtr);
108 timestamp_add_now(TS_FSP_MEMORY_INIT_START);
109 post_code(POSTCODE_FSP_MEMORY_INIT);
110 status = fsp_memory_init(&fsp_memory_init_params);
111 mainboard_after_memory_init();
112 post_code(0x37);
113 timestamp_add_now(TS_FSP_MEMORY_INIT_END);
115 printk(BIOS_DEBUG, "FspMemoryInit returned 0x%08x\n", status);
116 if (status != EFI_SUCCESS)
117 die_with_post_code(POSTCODE_RAM_FAILURE,
118 "ERROR - FspMemoryInit failed to initialize memory!\n");
120 /* Locate the FSP reserved memory area */
121 fsp_reserved_bytes = 0;
122 fsp_memory = get_resource_hob(&fsp_reserved_guid, hob_list_ptr);
123 if (fsp_memory == NULL) {
124 fsp_verification_failure = 1;
125 printk(BIOS_ERR,
126 "7.2: FSP_RESERVED_MEMORY_RESOURCE_HOB missing!\n");
127 } else {
128 fsp_reserved_bytes = fsp_memory->ResourceLength;
129 printk(BIOS_DEBUG, "Reserving 0x%016lx bytes for FSP\n",
130 (unsigned long int)fsp_reserved_bytes);
133 /* Display SMM area */
134 if (CONFIG(HAVE_SMI_HANDLER)) {
135 smm_region(&smm_base, &smm_size);
136 printk(BIOS_DEBUG, "0x%08x: smm_size\n", (unsigned int)smm_size);
137 printk(BIOS_DEBUG, "0x%08x: smm_base\n", (unsigned int)smm_base);
140 /* Migrate CAR data */
141 printk(BIOS_DEBUG, "%lx: cbmem_top\n", cbmem_top());
142 if (!s3wake) {
143 cbmem_initialize_empty_id_size(CBMEM_ID_FSP_RESERVED_MEMORY,
144 fsp_reserved_bytes);
145 } else if (cbmem_initialize_id_size(CBMEM_ID_FSP_RESERVED_MEMORY,
146 fsp_reserved_bytes)) {
147 printk(BIOS_DEBUG, "Failed to recover CBMEM in S3 resume.\n");
148 /* Failed S3 resume, reset to come up cleanly */
149 /* FIXME: A "system" reset is likely enough: */
150 full_reset();
153 /* Save the FSP runtime parameters. */
154 fsp_set_runtime(fsp_header, hob_list_ptr);
156 /* Lookup the FSP_BOOTLOADER_TOLUM_HOB */
157 cbmem_root = get_resource_hob(&bootldr_tolum_guid, hob_list_ptr);
158 if (cbmem_root == NULL) {
159 fsp_verification_failure = 1;
160 printk(BIOS_ERR, "7.4: FSP_BOOTLOADER_TOLUM_HOB missing!\n");
161 printk(BIOS_ERR, "BootLoaderTolumSize: 0x%08x bytes\n",
162 fsp_rt_common_buffer.BootLoaderTolumSize);
165 /* Locate the FSP_SMBIOS_MEMORY_INFO HOB */
166 memory_info_hob = get_guid_hob(&memory_info_hob_guid,
167 hob_list_ptr);
168 if (memory_info_hob == NULL) {
169 printk(BIOS_ERR, "FSP_SMBIOS_MEMORY_INFO HOB missing!\n");
170 fsp_verification_failure = 1;
173 if (hob_list_ptr == NULL)
174 die_with_post_code(POSTCODE_RAM_FAILURE,
175 "ERROR - HOB pointer is NULL!\n");
178 * Verify that FSP is generating the required HOBs:
179 * 7.1: FSP_BOOTLOADER_TEMP_MEMORY_HOB only produced for FSP 1.0
180 * 7.2: FSP_RESERVED_MEMORY_RESOURCE_HOB verified above
181 * 7.3: FSP_NON_VOLATILE_STORAGE_HOB only produced when
182 * new NVS data is generated, verified below
183 * 7.4: FSP_BOOTLOADER_TOLUM_HOB verified above
184 * 7.5: EFI_PEI_GRAPHICS_INFO_HOB produced by SiliconInit
185 * FSP_SMBIOS_MEMORY_INFO HOB verified above
187 hob_ptr.Raw = get_guid_hob(&mrc_guid, hob_list_ptr);
188 if ((hob_ptr.Raw == NULL) && (params->saved_data == NULL)) {
189 printk(BIOS_ERR, "7.3: FSP_NON_VOLATILE_STORAGE_HOB missing!\n");
190 fsp_verification_failure = 1;
193 /* Verify all the HOBs are present */
194 if (fsp_verification_failure)
195 printk(BIOS_ERR, "Missing one or more required FSP HOBs!\n");
197 /* Display the HOBs */
198 if (CONFIG(DISPLAY_HOBS))
199 print_hob_type_structure(0, hob_list_ptr);
201 /* Get the address of the CBMEM region for the FSP reserved memory */
202 fsp_reserved_memory_area = cbmem_find(CBMEM_ID_FSP_RESERVED_MEMORY);
203 printk(BIOS_DEBUG, "%p: fsp_reserved_memory_area\n",
204 fsp_reserved_memory_area);
206 /* Verify the order of CBMEM root and FSP memory */
207 if ((fsp_memory != NULL) && (cbmem_root != NULL) &&
208 (cbmem_root->PhysicalStart <= fsp_memory->PhysicalStart)) {
209 fsp_verification_failure = 1;
210 printk(BIOS_ERR, "FSP reserved memory above CBMEM root!\n");
213 /* Verify that the FSP memory was properly reserved */
214 if ((fsp_memory != NULL) && ((fsp_reserved_memory_area == NULL) ||
215 (fsp_memory->PhysicalStart !=
216 (unsigned int)fsp_reserved_memory_area))) {
217 fsp_verification_failure = 1;
218 printk(BIOS_ERR, "Reserving FSP memory area!\n");
220 if (CONFIG(HAVE_SMI_HANDLER) && cbmem_root != NULL) {
221 size_t delta_bytes = smm_base
222 - cbmem_root->PhysicalStart
223 - cbmem_root->ResourceLength;
224 printk(BIOS_ERR,
225 "0x%08x: Chipset reserved bytes reported by FSP\n",
226 (unsigned int)delta_bytes);
227 die_with_post_code(POSTCODE_INVALID_VENDOR_BINARY,
228 "Please verify the chipset reserved size\n");
232 /* Verify the FSP 1.1 HOB interface */
233 if (fsp_verification_failure)
234 die_with_post_code(POSTCODE_INVALID_VENDOR_BINARY,
235 "ERROR - coreboot's requirements not met by FSP binary!\n");
237 /* Locate the memory configuration data to speed up the next reboot */
238 mrc_hob = get_guid_hob(&mrc_guid, hob_list_ptr);
239 if (mrc_hob == NULL) {
240 printk(BIOS_DEBUG,
241 "Memory Configuration Data HOB not present\n");
242 } else {
243 params->data_to_save = GET_GUID_HOB_DATA(mrc_hob);
244 params->data_to_save_size = ALIGN_UP(
245 ((u32)GET_HOB_LENGTH(mrc_hob)), 16);
249 /* Initialize the SoC after MemoryInit */
250 __weak void mainboard_after_memory_init(void)
252 printk(BIOS_DEBUG, "WEAK: %s/%s called\n", __FILE__, __func__);