payloads/libpayload/include/sysinfo.h

   1 /*
   2  *
   3  * Copyright (C) 2008 Advanced Micro Devices, Inc.
   4  *
   5  * Redistribution and use in source and binary forms, with or without
   6  * modification, are permitted provided that the following conditions
   7  * are met:
   8  * 1. Redistributions of source code must retain the above copyright
   9  *    notice, this list of conditions and the following disclaimer.
  10  * 2. Redistributions in binary form must reproduce the above copyright
  11  *    notice, this list of conditions and the following disclaimer in the
  12  *    documentation and/or other materials provided with the distribution.
  13  * 3. The name of the author may not be used to endorse or promote products
  14  *    derived from this software without specific prior written permission.
  15  *
  16  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
  17  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  18  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  19  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
  20  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  21  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  22  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  23  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  24  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  25  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  26  * SUCH DAMAGE.
  27  */
  28
  29 #ifndef _SYSINFO_H
  30 #define _SYSINFO_H
  31
  32 #include <pci/pci.h>
  33 #include <stdint.h>
  34
  35 /* Maximum number of memory range definitions. */
  36 #define SYSINFO_MAX_MEM_RANGES 32
  37 /* Allow a maximum of 8 GPIOs */
  38 #define SYSINFO_MAX_GPIOS 8
  39
  40 /* Up to 10 MAC addresses */
  41 #define SYSINFO_MAX_MACS 10
  42
  43 /* Maximum of 2 MMAP windows for decoding SPI flash. */
  44 #define SYSINFO_MAX_MMAP_WINDOWS 2
  45
  46 #include <coreboot_tables.h>
  47
  48 /*
  49  * This is a collection of information and pointers gathered
  50  * mostly from the coreboot table.
  51  *
  52  * We do not store virtual pointers in here to avoid problems
  53  * with self-relocating payloads.
  54  */
  55 struct sysinfo_t {
  56         unsigned int cpu_khz;
  57         uintptr_t cb_serial;
  58         unsigned short ser_ioport;
  59         unsigned long ser_base; // for mmapped serial
  60
  61         int n_memranges;
  62
  63         struct memrange {
  64                 unsigned long long base;
  65                 unsigned long long size;
  66                 unsigned int type;
  67         } memrange[SYSINFO_MAX_MEM_RANGES];
  68
  69         uintptr_t cmos_option_table;
  70         u32 cmos_range_start;
  71         u32 cmos_range_end;
  72         u32 cmos_checksum_location;
  73         u32 vbnv_start;
  74         u32 vbnv_size;
  75
  76         uintptr_t version;
  77         uintptr_t extra_version;
  78         uintptr_t build;
  79         uintptr_t compile_time;
  80         uintptr_t compile_by;
  81         uintptr_t compile_host;
  82         uintptr_t compile_domain;
  83         uintptr_t compiler;
  84         uintptr_t linker;
  85         uintptr_t assembler;
  86         uintptr_t mem_chip_base;
  87         uintptr_t pcie_ctrl_base; /* Base address of PCIe controller */
  88
  89         uintptr_t cb_version;
  90
  91         struct cb_framebuffer framebuffer;
  92
  93         int num_gpios;
  94         struct cb_gpio gpios[SYSINFO_MAX_GPIOS];
  95         int num_macs;
  96         struct mac_address macs[SYSINFO_MAX_MACS];
  97         uintptr_t serialno;
  98
  99         unsigned long *mbtable; /** Pointer to the multiboot table */
 100
 101         uintptr_t cb_header;
 102         uintptr_t cb_mainboard;
 103
 104         uintptr_t vboot_workbuf;
 105
 106 #if CONFIG(LP_ARCH_X86)
 107         int x86_rom_var_mtrr_index;
 108 #endif
 109
 110         uintptr_t tstamp_table;
 111         uintptr_t cbmem_cons;
 112         uintptr_t mrc_cache;
 113         uintptr_t acpi_gnvs;
 114         uintptr_t acpi_cnvs;
 115         uintptr_t acpi_rsdp;
 116         uintptr_t smbios;
 117         uintptr_t cse_bp_info;
 118         uintptr_t cse_info;
 119
 120 #define UNDEFINED_STRAPPING_ID  (~0)
 121 #define UNDEFINED_FW_CONFIG     ~((uint64_t)0)
 122         u32             board_id;
 123         u32             ram_code;
 124         u32             sku_id;
 125
 126         /*
 127          * A payload using this field is responsible for ensuring it checks its
 128          * value against UNDEFINED_FW_CONFIG before using it.
 129          */
 130         u64             fw_config;
 131
 132         uintptr_t       wifi_calibration;
 133         uint64_t        ramoops_buffer;
 134         uint32_t        ramoops_buffer_size;
 135         struct {
 136                 uint32_t size;
 137                 uint32_t sector_size;
 138                 uint32_t erase_cmd;
 139                 uint32_t mmap_window_count;
 140                 struct flash_mmap_window mmap_table[SYSINFO_MAX_MMAP_WINDOWS];
 141         } spi_flash;
 142         uint64_t fmap_offset;
 143         uint64_t cbfs_offset;
 144         uint64_t cbfs_size;
 145         uint64_t boot_media_size;
 146         uint64_t mtc_start;
 147         uint32_t mtc_size;
 148         uintptr_t chromeos_vpd;
 149         int mmc_early_wake_status;
 150
 151         /* Pointer to FMAP cache in CBMEM */
 152         uintptr_t fmap_cache;
 153
 154 #if CONFIG(LP_PCI)
 155         struct pci_access pacc;
 156 #endif
 157         /* USB Type-C Port Configuration Info */
 158         uintptr_t type_c_info;
 159
 160         /* CBFS RW/RO Metadata Cache */
 161         uintptr_t cbfs_ro_mcache_offset;
 162         uint32_t cbfs_ro_mcache_size;
 163         uintptr_t cbfs_rw_mcache_offset;
 164         uint32_t cbfs_rw_mcache_size;
 165 };
 166
 167 extern struct sysinfo_t lib_sysinfo;
 168
 169 /*
 170  * Check if this is an architecture specific coreboot table record and process
 171  * it, if it is. Return 1 if record type was recognized, 0 otherwise.
 172  */
 173 int cb_parse_arch_specific(struct cb_record *rec, struct sysinfo_t *info);
 174
 175 /*
 176  * Check if the region in range addr..addr+len contains a 16 byte aligned
 177  * coreboot table. If it does - process the table filling up the sysinfo
 178  * structure with information from the table. Return 0 on success and -1 on
 179  * failure.
 180  */
 181 int cb_parse_header(void *addr, int len, struct sysinfo_t *info);
 182
 183 #endif