src/include/cpu/x86/lapic_def.h

   1 /* SPDX-License-Identifier: GPL-2.0-only */
   2
   3 #ifndef CPU_X86_LAPIC_DEF_H
   4 #define CPU_X86_LAPIC_DEF_H
   5
   6 #define LAPIC_BASE_MSR 0x1B
   7 #define LAPIC_BASE_MSR_BOOTSTRAP_PROCESSOR (1 << 8)
   8 #define LAPIC_BASE_MSR_X2APIC_MODE (1 << 10)
   9 #define LAPIC_BASE_MSR_ENABLE (1 << 11)
  10 #define LAPIC_BASE_X2APIC_ENABLED \
  11         (LAPIC_BASE_MSR_X2APIC_MODE | LAPIC_BASE_MSR_ENABLE)
  12 #define LAPIC_BASE_MSR_ADDR_MASK 0xFFFFF000
  13
  14 #define LAPIC_DEFAULT_BASE 0xfee00000
  15
  16 #define LAPIC_ID                0x020
  17 #define LAPIC_LVR       0x030
  18 #define LAPIC_TASKPRI   0x80
  19 #define         LAPIC_TPRI_MASK         0xFF
  20 #define LAPIC_ARBID     0x090
  21 #define LAPIC_RRR       0x0C0
  22 #define LAPIC_SVR       0x0f0
  23 #define LAPIC_SPIV      0x0f0
  24 #define         LAPIC_SPIV_ENABLE  0x100
  25 #define LAPIC_ESR       0x280
  26 #define         LAPIC_ESR_SEND_CS       0x00001
  27 #define         LAPIC_ESR_RECV_CS       0x00002
  28 #define         LAPIC_ESR_SEND_ACC      0x00004
  29 #define         LAPIC_ESR_RECV_ACC      0x00008
  30 #define         LAPIC_ESR_SENDILL       0x00020
  31 #define         LAPIC_ESR_RECVILL       0x00040
  32 #define         LAPIC_ESR_ILLREGA       0x00080
  33 #define LAPIC_ICR       0x300
  34 #define         LAPIC_DEST_SELF         0x40000
  35 #define         LAPIC_DEST_ALLINC       0x80000
  36 #define         LAPIC_DEST_ALLBUT       0xC0000
  37 #define         LAPIC_ICR_RR_MASK       0x30000
  38 #define         LAPIC_ICR_RR_INVALID    0x00000
  39 #define         LAPIC_ICR_RR_INPROG     0x10000
  40 #define         LAPIC_ICR_RR_VALID      0x20000
  41 #define         LAPIC_INT_LEVELTRIG     0x08000
  42 #define         LAPIC_INT_ASSERT                0x04000
  43 #define         LAPIC_ICR_BUSY          0x01000
  44 #define         LAPIC_DEST_LOGICAL      0x00800
  45 #define         LAPIC_DM_FIXED          0x00000
  46 #define         LAPIC_DM_LOWEST         0x00100
  47 #define         LAPIC_DM_SMI            0x00200
  48 #define         LAPIC_DM_REMRD          0x00300
  49 #define         LAPIC_DM_NMI            0x00400
  50 #define         LAPIC_DM_INIT           0x00500
  51 #define         LAPIC_DM_STARTUP                0x00600
  52 #define         LAPIC_DM_EXTINT         0x00700
  53 #define         LAPIC_VECTOR_MASK       0x000FF
  54 #define LAPIC_ICR2      0x310
  55 #define         GET_LAPIC_DEST_FIELD(x) (((x)>>24)&0xFF)
  56 #define         SET_LAPIC_DEST_FIELD(x) ((x)<<24)
  57 #define LAPIC_LVTT      0x320
  58 #define LAPIC_LVTPC     0x340
  59 #define LAPIC_LVT0      0x350
  60 #define         LAPIC_LVT_TIMER_BASE_MASK       (0x3<<18)
  61 #define         GET_LAPIC_TIMER_BASE(x)         (((x)>>18)&0x3)
  62 #define         SET_LAPIC_TIMER_BASE(x)         (((x)<<18))
  63 #define         LAPIC_TIMER_BASE_CLKIN          0x0
  64 #define         LAPIC_TIMER_BASE_TMBASE         0x1
  65 #define         LAPIC_TIMER_BASE_DIV            0x2
  66 #define         LAPIC_LVT_TIMER_PERIODIC                (1<<17)
  67 #define         LAPIC_LVT_MASKED                        (1<<16)
  68 #define         LAPIC_LVT_LEVEL_TRIGGER         (1<<15)
  69 #define         LAPIC_LVT_REMOTE_IRR            (1<<14)
  70 #define         LAPIC_INPUT_POLARITY            (1<<13)
  71 #define         LAPIC_SEND_PENDING              (1<<12)
  72 #define         LAPIC_LVT_RESERVED_1            (1<<11)
  73 #define         LAPIC_DELIVERY_MODE_MASK                (7<<8)
  74 #define         LAPIC_DELIVERY_MODE_FIXED       (0<<8)
  75 #define         LAPIC_DELIVERY_MODE_NMI         (4<<8)
  76 #define         LAPIC_DELIVERY_MODE_EXTINT      (7<<8)
  77 #define         GET_LAPIC_DELIVERY_MODE(x)      (((x)>>8)&0x7)
  78 #define         SET_LAPIC_DELIVERY_MODE(x, y)   (((x)&~0x700)|((y)<<8))
  79 #define                 LAPIC_MODE_FIXED                0x0
  80 #define                 LAPIC_MODE_NMI          0x4
  81 #define                 LAPIC_MODE_EXINT                0x7
  82 #define LAPIC_LVT1      0x360
  83 #define LAPIC_LVTERR    0x370
  84 #define LAPIC_TMICT     0x380
  85 #define LAPIC_TMCCT     0x390
  86 #define LAPIC_TDCR      0x3E0
  87 #define         LAPIC_TDR_DIV_TMBASE    (1<<2)
  88 #define         LAPIC_TDR_DIV_1         0xB
  89 #define         LAPIC_TDR_DIV_2         0x0
  90 #define         LAPIC_TDR_DIV_4         0x1
  91 #define         LAPIC_TDR_DIV_8         0x2
  92 #define         LAPIC_TDR_DIV_16                0x3
  93 #define         LAPIC_TDR_DIV_32                0x8
  94 #define         LAPIC_TDR_DIV_64                0x9
  95 #define         LAPIC_TDR_DIV_128       0xA
  96
  97 #define X2APIC_MSR_BASE_ADDRESS 0x800
  98 #define X2APIC_LAPIC_ID         (X2APIC_MSR_BASE_ADDRESS | (LAPIC_ID >> 4))
  99 #define X2APIC_MSR_ICR_ADDRESS  0x830
 100 #endif /* CPU_X86_LAPIC_DEF_H */