soc/intel/common/block/itss: Route PCI INT pin to PIRQ using PIR

[coreboot2.git] / configs / config.asus_a88xm-e.agesa_debug

CONFIG_VENDOR_ASUS=y
CONFIG_BOARD_ASUS_A88XM_E=y
CONFIG_ENABLE_MRC_CACHE=y
CONFIG_IDS_TRACING_ENABLED=y
CONFIG_AGESA_EXTRA_TIMESTAMPS=y
CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8=y
CONFIG_DEBUG_RESOURCES=y