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soc/intel/common/block/itss: Route PCI INT pin to PIRQ using PIR
[coreboot2.git] / configs / config.emulation_qemu_x86_q35_smm_tseg
blob0ec233baa29f38a6b4dd0533e5b48410ed08ebb0
1 CONFIG_VENDOR_EMULATION=y
2 CONFIG_BOARD_EMULATION_QEMU_X86_Q35=y
3 CONFIG_CPU_QEMU_X86_TSEG_SMM=y
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