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HEAD
soc/intel/common/block/itss: Route PCI INT pin to PIRQ using PIR
[coreboot2.git]
/
configs
/
config.google_kevin_secdata_mock
blob
97d6a3a30c000f6f9e2f3ad2c93863e90d6f1986
1
CONFIG_VENDOR_GOOGLE=y
2
CONFIG_BOARD_GOOGLE_KEVIN=y
3
CONFIG_CHROMEOS=y
4
CONFIG_VBOOT_MOCK_SECDATA=y
5
CONFIG_PAYLOAD_NONE=y