soc/intel/common/block/itss: Route PCI INT pin to PIRQ using PIR

[coreboot2.git] / configs / config.lattepanda_mu

CONFIG_VENDOR_LATTEPANDA=y
CONFIG_ONBOARD_VGA_IS_PRIMARY=y
CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5=y
CONFIG_PAYLOAD_EDK2=y
CONFIG_EDK2_BOOT_MANAGER_ESCAPE=y
CONFIG_EDK2_FOLLOW_BGRT_SPEC=y
# CONFIG_EDK2_PS2_SUPPORT is not set
CONFIG_EDK2_SERIAL_SUPPORT=y