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soc/intel/common/block/itss: Route PCI INT pin to PIRQ using PIR
[coreboot2.git]
/
configs
/
config.lenovo_x220_mrc_bin
blob
a51c498904965d0fbce8c91fe5bb9b428a62476a
1
CONFIG_VENDOR_LENOVO=y
2
CONFIG_BOARD_LENOVO_X220=y
3
# CONFIG_USE_NATIVE_RAMINIT is not set
