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soc/intel/common/block/itss: Route PCI INT pin to PIRQ using PIR
[coreboot2.git] / configs / config.up_squared.vboot_spi_flash_console
blob351e1ca8d645db08b9186b5b6b9eb1c29eebd490
1 CONFIG_VENDOR_UP=y
2 CONFIG_BOARD_UP_SQUARED=y
3 CONFIG_VBOOT=y
4 CONFIG_CONSOLE_SPI_FLASH=y
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