soc/intel/common/block/itss: Route PCI INT pin to PIRQ using PIR
[coreboot2.git] / util / inteltool / gfx.c
blobbd85fae2aa8ccd12642fc10a07647702391936fd
1 /* inteltool - dump all registers on an Intel CPU + chipset based system */
2 /* SPDX-License-Identifier: GPL-2.0-only */
4 #include <stdio.h>
5 #include <stdlib.h>
6 #include <inttypes.h>
7 #include "inteltool.h"
9 #define MMIO_SIZE 0x100000
11 int print_gfx(struct pci_dev *gfx)
13 uint64_t mmio_phys;
14 uint8_t *mmio;
15 uint32_t i;
16 if (!gfx) {
17 printf ("No IGD found\n");
18 return 0;
20 printf("\n============= IGD ==============\n\n");
21 mmio_phys = gfx->base_addr[0] & ~0x7ULL;
22 printf("IGD MMIO = 0x%08llx (MEM)\n\n", (unsigned long long)mmio_phys);
23 mmio = map_physical(mmio_phys, MMIO_SIZE);
24 if (mmio == NULL) {
25 perror("Error mapping MMIO");
26 exit(1);
28 for (i = 0; i < MMIO_SIZE; i += 4) {
29 if (read32(mmio + i))
30 printf("0x%06x: 0x%08x\n", i, read32(mmio + i));
32 unmap_physical((void *)mmio, MMIO_SIZE);
33 return 0;