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mb/google/brya/var/orisa: Update Type C DisplayPort HPD Configuration
[coreboot2.git] / src / mainboard / google / brya / variants / crota / overridetree.cb
blobfa8a83e8fcc05fbe776f530c4b640defdabfc89e
1 fw_config
2 field MB_SD 0 1
3 option SD_ABSENT 0
4 option SD_GL9750 1
5 end
6 field KB_BL 2 2
7 option KB_BL_ABSENT 0
8 option KB_BL_PRESENT 1
9 end
10 field AUDIO 3 5
11 option AUDIO_UNKNOWN 0
12 option MAX98360_CS42L42 1
13 end
14 field DB_LTE 6 7
15 option LTE_ABSENT 0
16 option LTE_USB 1
17 end
18 end
19
20 chip soc/intel/alderlake
21 register "sagv" = "SaGv_Enabled"
22 register "max_dram_speed_mts" = "4800"
23 register "cnvi_bt_audio_offload" = "1"
24 # +-----------+-------+-------+---------+-------------+----------+
25 # | Setting | AC LL | DC LL | ICC MAX | TDC Current | TDC Time |
26 # | |(mOhms)|(mOhms)| (A) | (A) | (msec) |
27 # +-----------+-------+-------+---------+-------------+----------+
28 # | IA | 2.8 | 2.8 | 80 | 43 | 28000 |
29 # +-----------+-------+-------+---------+-------------+----------+
30 # | GT | 3.2 | 3.2 | 40 | 23 | 28000 |
31 # +-----------+-------+-------+---------+-------------+----------+
32 register "domain_vr_config[VR_DOMAIN_IA]" = "{
33 .vr_config_enable = 1,
34 .ac_loadline = 280,
35 .dc_loadline = 280,
36 .icc_max = VR_CFG_AMP(80),
37 .tdc_timewindow = 28000,
38 .tdc_currentlimit = VR_CFG_TDC_AMP(43),
39 }"
40
41 register "domain_vr_config[VR_DOMAIN_GT]" = "{
42 .vr_config_enable = 1,
43 .ac_loadline = 320,
44 .dc_loadline = 320,
45 .icc_max = VR_CFG_AMP(40),
46 .tdc_timewindow = 28000,
47 .tdc_currentlimit = VR_CFG_TDC_AMP(23),
48 }"
49
50 # Acoustic settings
51 register "acoustic_noise_mitigation" = "1"
52 register "slow_slew_rate[VR_DOMAIN_IA]" = "SLEW_FAST_4"
53 register "slow_slew_rate[VR_DOMAIN_GT]" = "SLEW_FAST_4"
54 register "fast_pkg_c_ramp_disable[VR_DOMAIN_IA]" = "1"
55 register "fast_pkg_c_ramp_disable[VR_DOMAIN_GT]" = "1"
56
57 # As per Intel Advisory doc#723158, the change is required to prevent possible
58 # display flickering issue.
59 register "usb2_phy_sus_pg_disable" = "1"
60
61 # Intel Common SoC Config
62 #+-------------------+---------------------------+
63 #| Field | Value |
64 #+-------------------+---------------------------+
65 #| GSPI1 | Fingerprint MCU |
66 #| I2C0 | Audio |
67 #| I2C1 | cr50 TPM. Early init is |
68 #| | required to set up a BAR |
69 #| | for TPM communication |
70 #| I2C2 | |
71 #| I2C3 | Touchscreen |
72 #| I2C5 | Trackpad |
73 #+-------------------+---------------------------+
74 register "common_soc_config" = "{
75 .i2c[0] = {
76 .speed = I2C_SPEED_FAST,
77 },
78 .i2c[1] = {
79 .early_init = 1,
80 .speed = I2C_SPEED_FAST,
81 .rise_time_ns = 600,
82 .fall_time_ns = 400,
83 .data_hold_time_ns = 50,
84 },
85 .i2c[2] = {
86 .speed = I2C_SPEED_FAST,
87 },
88 .i2c[3] = {
89 .speed = I2C_SPEED_FAST,
90 .rise_time_ns = 650,
91 .fall_time_ns = 400,
92 .data_hold_time_ns = 50,
93 },
94 .i2c[5] = {
95 .speed = I2C_SPEED_FAST,
96 },
97 }"
98
99 register "usb2_ports[1]" = "USB2_PORT_EMPTY" # Disable USB2_C1
100 register "usb2_ports[4]" = "USB2_PORT_EMPTY" # Disable USB2_C4
101 register "usb2_ports[6]" = "USB2_PORT_EMPTY" # Disable USB2_C6
102 register "usb2_ports[7]" = "USB2_PORT_MID(OC_SKIP)" # Type-A MLB Port
103 register "usb2_ports[8]" = "USB2_PORT_EMPTY" # Disable USB2_C8
104 register "usb3_ports[0]" = "USB3_PORT_EMPTY"
105 register "usb3_ports[1]" = "USB3_PORT_DEFAULT(OC_SKIP)" # USB3/2 Type A MLB port
106 register "tcss_ports[1]" = "TCSS_PORT_EMPTY"
107 register "tcc_offset" = "1" # TCC of 99C
108
109 device domain 0 on
110 device ref igpu on
111 chip drivers/gfx/generic
112 register "device_count" = "6"
113 # DDIA for eDP
114 register "device[0].name" = ""LCD0""
115 # Internal panel on the first port of the graphics chip
116 register "device[0].type" = "panel"
117 # DDIB for HDMI
118 register "device[1].name" = ""DD01""
119 # TCP0 (DP-1) for port C0
120 register "device[2].name" = ""DD02""
121 register "device[2].use_pld" = "true"
122 register "device[2].pld" = "ACPI_PLD_TYPE_C(LEFT, LEFT, ACPI_PLD_GROUP(1, 1))"
123 # TCP1 (DP-2) is unused for any ports but still enumerated in the kernel, so GFX device is added for TCP1
124 register "device[3].name" = ""DD03""
125 # TCP2 (DP-3) for port C2
126 register "device[4].name" = ""DD04""
127 register "device[4].use_pld" = "true"
128 register "device[4].pld" = "ACPI_PLD_TYPE_C(RIGHT, RIGHT, ACPI_PLD_GROUP(2, 1))"
129 # TCP3 (DP-4) is unused for any ports but still enumerated in the kernel, so GFX device is added for TCP3
130 register "device[5].name" = ""DD05""
131 device generic 0 on end
132 end
133 end # Integrated Graphics Device
134 device ref dtt on
135 chip drivers/intel/dptf
136 ## sensor information
137 register "options.tsr[0].desc" = ""SOC""
138 register "options.tsr[1].desc" = ""DRAM""
139 register "options.tsr[2].desc" = ""Charger""
140 register "options.tsr[3].desc" = ""Ambient""
141
142 ## Passive Policy
143 register "policies.passive" = "{
144 [0] = DPTF_PASSIVE(CPU, CPU, 95, 5000),
145 [1] = DPTF_PASSIVE(CPU, TEMP_SENSOR_0, 90, 5000),
146 [2] = DPTF_PASSIVE(CPU, TEMP_SENSOR_1, 90, 5000),
147 [3] = DPTF_PASSIVE(CHARGER, TEMP_SENSOR_2, 90, 5000),
148 [4] = DPTF_PASSIVE(CPU, TEMP_SENSOR_3, 90, 5000),
149 }"
150
151 ## Critical Policy
152 register "policies.critical" = "{
153 [0] = DPTF_CRITICAL(CPU, 105, SHUTDOWN),
154 [1] = DPTF_CRITICAL(TEMP_SENSOR_0, 85, SHUTDOWN),
155 [2] = DPTF_CRITICAL(TEMP_SENSOR_1, 85, SHUTDOWN),
156 [3] = DPTF_CRITICAL(TEMP_SENSOR_2, 85, SHUTDOWN),
157 [4] = DPTF_CRITICAL(TEMP_SENSOR_3, 85, SHUTDOWN),
158 }"
159
160 register "controls.power_limits" = "{
161 .pl1 = {
162 .min_power = 3000,
163 .max_power = 15000,
164 .time_window_min = 28 * MSECS_PER_SEC,
165 .time_window_max = 32 * MSECS_PER_SEC,
166 .granularity = 200,
167 },
168 .pl2 = {
169 .min_power = 55000,
170 .max_power = 55000,
171 .time_window_min = 28 * MSECS_PER_SEC,
172 .time_window_max = 32 * MSECS_PER_SEC,
173 .granularity = 1000,
174 }
175 }"
176
177 ## Charger Performance Control (Control, mA)
178 register "controls.charger_perf" = "{
179 [0] = { 255, 1700 },
180 [1] = { 24, 1500 },
181 [2] = { 16, 1000 },
182 [3] = { 8, 500 }
183 }"
184 device generic 0 alias dptf_policy on end
185 end
186 end
187 device ref cnvi_wifi on
188 chip drivers/wifi/generic
189 register "wake" = "GPE0_PME_B0"
190 device generic 0 on end
191 end
192 end
193 device ref pcie_rp3 on
194 chip soc/intel/common/block/pcie/rtd3
195 register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_B4)"
196 register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_D11)"
197 register "srcclk_pin" = "1"
198 register "reset_delay_ms" = "50"
199 register "enable_delay_ms" = "20"
200 device generic 0 alias emmc_rtd3 on end
201 end
202 # Enable PCIe-to-eMMC bridge PCIE 3 using clk 1
203 register "pch_pcie_rp[PCH_RP(3)]" = "{
204 .clk_src = 1,
205 .clk_req = 1,
206 .flags = PCIE_RP_LTR | PCIE_RP_AER,
207 }"
208 end #PCIE3 BH799BB
209 device ref pcie_rp9 off end
210 device ref tcss_dma0 on
211 chip drivers/intel/usb4/retimer
212 register "dfp[0].power_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_E4)"
213 use tcss_usb3_port1 as dfp[0].typec_port
214 device generic 0 on end
215 end
216 end
217 device ref tcss_dma1 on
218 chip drivers/intel/usb4/retimer
219 register "dfp[0].power_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_E4)"
220 use tcss_usb3_port3 as dfp[0].typec_port
221 device generic 0 on end
222 end
223 end
224 device ref pcie_rp6 off end #PCIE6 WWAN
225 device ref pcie_rp8 on
226 chip soc/intel/common/block/pcie/rtd3
227 register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_H13)"
228 register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_D18)"
229 register "srcclk_pin" = "3"
230 device generic 0 on end
231 end
232 end #PCIE8 SD card
233 device ref pcie4_0 on
234 # Enable CPU PCIE RP 1 using CLK 0
235 register "cpu_pcie_rp[CPU_RP(1)]" = "{
236 .clk_req = 0,
237 .clk_src = 0,
238 .flags = PCIE_RP_LTR | PCIE_RP_AER,
239 }"
240 end
241 device ref i2c0 on
242 chip drivers/i2c/cs42l42
243 register "irq" = "ACPI_IRQ_LEVEL_LOW(GPP_A23_IRQ)"
244 register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_B15)"
245 register "ts_inv" = "true"
246 register "ts_dbnc_rise" = "RISE_DEB_1000_MS"
247 register "ts_dbnc_fall" = "FALL_DEB_0_MS"
248 register "btn_det_init_dbnce" = "100"
249 register "btn_det_event_dbnce" = "10"
250 register "bias_lvls[0]" = "15"
251 register "bias_lvls[1]" = "8"
252 register "bias_lvls[2]" = "4"
253 register "bias_lvls[3]" = "1"
254 register "hs_bias_ramp_rate" = "HSBIAS_RAMP_SLOW"
255 register "hs_bias_sense_disable" = "true"
256 device i2c 48 on end
257 end
258 end #I2C0
259 device ref i2c1 on
260 chip drivers/i2c/tpm
261 register "hid" = ""GOOG0005""
262 register "irq" = "ACPI_IRQ_EDGE_LOW(GPP_A13_IRQ)"
263 device i2c 50 on end
264 end
265 end
266 device ref i2c3 on
267 chip drivers/i2c/hid
268 register "generic.hid" = ""ELAN900C""
269 register "generic.desc" = ""ELAN Touchscreen""
270 register "generic.irq" = "ACPI_IRQ_LEVEL_LOW(GPP_C7_IRQ)"
271 register "generic.detect" = "1"
272 register "generic.reset_gpio" =
273 "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C1)"
274 register "generic.reset_delay_ms" = "150"
275 register "generic.reset_off_delay_ms" = "1"
276 register "generic.enable_gpio" =
277 "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_C0)"
278 register "generic.enable_delay_ms" = "6"
279 register "generic.stop_gpio" =
280 "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C6)"
281 register "generic.stop_off_delay_ms" = "1"
282 register "generic.has_power_resource" = "1"
283 register "hid_desc_reg_offset" = "0x01"
284 device i2c 0x16 on end
285 end
286 end
287 device ref i2c5 on
288 chip drivers/i2c/generic
289 register "hid" = ""ELAN0000""
290 register "desc" = ""ELAN Touchpad""
291 register "irq" = "ACPI_IRQ_WAKE_LEVEL_LOW(GPP_F14_IRQ)"
292 register "wake" = "GPE0_DW2_14"
293 register "detect" = "1"
294 device i2c 15 on end
295 end
296 chip drivers/i2c/hid
297 register "generic.hid" = ""GXTP7863""
298 register "generic.desc" = ""Goodix Touchpad""
299 register "generic.irq" = "ACPI_IRQ_LEVEL_LOW(GPP_F14_IRQ)"
300 register "generic.wake" = "GPE0_DW2_14"
301 register "generic.detect" = "1"
302 register "hid_desc_reg_offset" = "0x20"
303 device i2c 2c on end
304 end
305 end
306 device ref hda on
307 chip drivers/generic/max98357a
308 register "hid" = ""MX98360A""
309 register "sdmode_gpio" =
310 "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_A11)"
311 register "sdmode_delay" = "5"
312 device generic 0 on end
313 end
314 end
315 device ref gspi1 on
316 chip drivers/spi/acpi
317 register "name" = ""CRFP""
318 register "hid" = "ACPI_DT_NAMESPACE_HID"
319 register "uid" = "1"
320 register "compat_string" = ""google,cros-ec-spi""
321 register "irq" = "ACPI_IRQ_WAKE_LEVEL_LOW(GPP_F15_IRQ)"
322 register "wake" = "GPE0_DW2_15"
323 register "has_power_resource" = "1"
324 register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_D1)"
325 register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_D2)"
326 register "enable_delay_ms" = "3"
327 device spi 0 hidden end
328 end # FPMCU
329 end
330 device ref pch_espi on
331 chip ec/google/chromeec
332 use conn0 as mux_conn[0]
333 use conn1 as mux_conn[1]
334 device pnp 0c09.0 on end
335 end
336 end
337 device ref pmc hidden
338 chip drivers/intel/pmc_mux
339 device generic 0 on
340 chip drivers/intel/pmc_mux/conn
341 use usb2_port1 as usb2_port
342 use tcss_usb3_port1 as usb3_port
343 device generic 0 alias conn0 on end
344 end
345 chip drivers/intel/pmc_mux/conn
346 use usb2_port3 as usb2_port
347 use tcss_usb3_port3 as usb3_port
348 device generic 1 alias conn1 on end
349 end
350 end
351 end
352 end
353 device ref tcss_xhci on
354 chip drivers/usb/acpi
355 device ref tcss_root_hub on
356 chip drivers/usb/acpi
357 register "desc" = ""USB3 Type-C Port C0 (MLB)""
358 register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
359 register "use_custom_pld" = "true"
360 register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, LEFT, ACPI_PLD_GROUP(1, 1))"
361 device ref tcss_usb3_port1 on end
362 end
363 chip drivers/usb/acpi
364 register "desc" = ""USB3 Type-C Port C2 (MLB)""
365 register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
366 register "use_custom_pld" = "true"
367 register "custom_pld" = "ACPI_PLD_TYPE_C(RIGHT, RIGHT, ACPI_PLD_GROUP(2, 1))"
368 device ref tcss_usb3_port3 on end
369 end
370 end
371 end
372 end
373 device ref xhci on
374 chip drivers/usb/acpi
375 device ref xhci_root_hub on
376 chip drivers/usb/acpi
377 register "desc" = ""USB2 Type-C Port C0 (MLB)""
378 register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
379 register "use_custom_pld" = "true"
380 register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, LEFT, ACPI_PLD_GROUP(1, 1))"
381 device ref usb2_port1 on end
382 end
383 chip drivers/usb/acpi
384 register "desc" = ""USB2 Type-C Port C2 (MLB)""
385 register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
386 register "use_custom_pld" = "true"
387 register "custom_pld" = "ACPI_PLD_TYPE_C(RIGHT, RIGHT, ACPI_PLD_GROUP(2, 1))"
388 device ref usb2_port3 on end
389 end
390 chip drivers/usb/acpi
391 register "desc" = ""USB2 WWAN""
392 register "type" = "UPC_TYPE_INTERNAL"
393 device ref usb2_port4 on end
394 end
395 chip drivers/usb/acpi
396 register "desc" = ""USB2 Camera""
397 register "type" = "UPC_TYPE_INTERNAL"
398 device ref usb2_port6 on end
399 end
400 chip drivers/usb/acpi
401 register "desc" = ""USB2 Type-A Port (MLB)""
402 register "type" = "UPC_TYPE_A"
403 register "use_custom_pld" = "true"
404 register "custom_pld" = "ACPI_PLD_TYPE_A(LEFT, LEFT, ACPI_PLD_GROUP(3, 1))"
405 device ref usb2_port8 on end
406 end
407 chip drivers/usb/acpi
408 register "desc" = ""USB2 Bluetooth""
409 register "type" = "UPC_TYPE_INTERNAL"
410 register "reset_gpio" =
411 "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_D4)"
412 device ref usb2_port10 on end
413 end
414 chip drivers/usb/acpi
415 register "desc" = ""USB3 Type-A Port (MLB)""
416 register "type" = "UPC_TYPE_USB3_A"
417 register "use_custom_pld" = "true"
418 register "custom_pld" = "ACPI_PLD_TYPE_A(LEFT, LEFT, ACPI_PLD_GROUP(3, 1))"
419 device ref usb3_port2 on end
420 end
421 chip drivers/usb/acpi
422 register "desc" = ""USB3 WWAN""
423 register "type" = "UPC_TYPE_INTERNAL"
424 device ref usb3_port4 on end
425 end
426 end
427 end
428 end
429 end
430 end
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