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mb/google/brya/var/orisa: Update Type C DisplayPort HPD Configuration
[coreboot2.git] / src / mainboard / google / brya / variants / marasov / overridetree.cb
blob35cd598697f8e247e5a72d7fb116195073354a71
1 fw_config
2 field KB_BL 0 0
3 option KB_BL_ABSENT 0
4 option KB_BL_PRESENT 1
5 end
6 field AUDIO 1 3
7 option AUDIO_UNKNOWN 0
8 option ALC1019_ALC5682I_VD_I2S 1
9 option ALC1019_ALC5682I_VS_I2S 2
10 end
11 field UFC 4 4
12 option UFC_USB 0
13 option UFC_MIPI 1
14 end
15 field TOUCH 5 5
16 option TOUCH_NONE 0
17 option TOUCH_ELAN0001 1
18 end
19 field WIFI_SAR_ID 6 7
20 option WIFI_SAR_ID_0 0
21 option WIFI_SAR_ID_1 1
22 end
23 field STORAGE 30 31
24 option STORAGE_UNKNOWN 0
25 option STORAGE_NVME 1
26 option STORAGE_UFS 2
27 end
28 end
29
30 chip soc/intel/alderlake
31 # Acoustic settings
32 register "acoustic_noise_mitigation" = "1"
33 register "slow_slew_rate[VR_DOMAIN_IA]" = "SLEW_FAST_8"
34 register "slow_slew_rate[VR_DOMAIN_GT]" = "SLEW_FAST_8"
35 register "fast_pkg_c_ramp_disable[VR_DOMAIN_IA]" = "1"
36 register "fast_pkg_c_ramp_disable[VR_DOMAIN_GT]" = "1"
37
38 # Intel Common SoC Config
39 #+-------------------+---------------------------+
40 #| Field | Value |
41 #+-------------------+---------------------------+
42 #| GSPI1 | Fingerprint MCU |
43 #| I2C0 | Audio |
44 #| I2C1 | cr50 TPM. Early init is |
45 #| | required to set up a BAR |
46 #| | for TPM communication |
47 #| I2C3 | TouchScreen |
48 #| I2C5 | Trackpad |
49 #+-------------------+---------------------------+
50 register "common_soc_config" = "{
51 .i2c[0] = {
52 .speed = I2C_SPEED_FAST,
53 .rise_time_ns = 650,
54 .fall_time_ns = 400,
55 .data_hold_time_ns = 50,
56 },
57 .i2c[1] = {
58 .early_init = 1,
59 .speed = I2C_SPEED_FAST,
60 .rise_time_ns = 600,
61 .fall_time_ns = 400,
62 .data_hold_time_ns = 50,
63 },
64 .i2c[3] = {
65 .speed = I2C_SPEED_FAST,
66 .rise_time_ns = 650,
67 .fall_time_ns = 400,
68 .data_hold_time_ns = 50,
69 },
70 .i2c[5] = {
71 .speed = I2C_SPEED_FAST,
72 .rise_time_ns = 650,
73 .fall_time_ns = 400,
74 .data_hold_time_ns = 50,
75 },
76 }"
77 register "sagv" = "SaGv_Enabled"
78
79 register "ext_fivr_settings" = "{
80 .configure_ext_fivr = 1,
81 .v1p05_enable_bitmap = FIVR_ENABLE_ALL_SX,
82 .vnn_enable_bitmap = FIVR_ENABLE_ALL_SX,
83 .v1p05_supported_voltage_bitmap = FIVR_VOLTAGE_NORMAL |
84 FIVR_VOLTAGE_MIN_ACTIVE |
85 FIVR_VOLTAGE_MIN_RETENTION,
86 .vnn_supported_voltage_bitmap = FIVR_VOLTAGE_NORMAL |
87 FIVR_VOLTAGE_MIN_ACTIVE |
88 FIVR_VOLTAGE_MIN_RETENTION,
89 .v1p05_icc_max_ma = 500,
90 .vnn_sx_voltage_mv = 1250,
91 }"
92
93 # As per Intel Advisory doc#723158, the change is required to prevent possible
94 # display flickering issue.
95 register "disable_dynamic_tccold_handshake" = "true"
96
97 register "serial_io_i2c_mode" = "{
98 [PchSerialIoIndexI2C0] = PchSerialIoPci,
99 [PchSerialIoIndexI2C1] = PchSerialIoPci,
100 [PchSerialIoIndexI2C2] = PchSerialIoDisabled,
101 [PchSerialIoIndexI2C3] = PchSerialIoPci,
102 [PchSerialIoIndexI2C4] = PchSerialIoDisabled,
103 [PchSerialIoIndexI2C5] = PchSerialIoPci,
104 }"
105
106 # SOC Aux orientation override:
107 # This is a bitfield that corresponds to up to 4 TCSS ports.
108 # Bits (0,1) are allocated for TCSS Port1 configuration and Bits (2,3) for TCSS Port2.
109 # TcssAuxOri = 0101b
110 # Bit0, Bit2 set to "1" indicates no retimer on USB-C Ports
111 # Bit1, Bit3 set to "0" indicates Aux lines are not swapped on the
112 # motherboard to USB-C connector
113 register "tcss_aux_ori" = "1"
114 register "typec_aux_bias_pads[0]" = "{.pad_auxp_dc = GPP_E22,
115 .pad_auxn_dc = GPP_E23}"
116
117 register "usb2_ports[0]" = "USB2_PORT_TYPE_C(OC0)" # USB2_C0
118 register "usb2_ports[1]" = "USB2_PORT_EMPTY" # Disable USB2_Port 1
119 register "usb2_ports[2]" = "USB2_PORT_TYPE_C(OC1)" # USB2_C2
120 register "usb2_ports[3]" = "USB2_PORT_MID(OC2)" # Type-A Port A1
121 register "usb2_ports[4]" = "USB2_PORT_EMPTY" # Disable USB2 Port 4
122 register "usb2_ports[5]" = "USB2_PORT_MID(OC_SKIP)" # M.2 Camera
123 register "usb2_ports[6]" = "USB2_PORT_EMPTY" # Disable USB2 Port 6
124 register "usb2_ports[7]" = "USB2_PORT_MID(OC_SKIP)" # DCI port
125 register "usb2_ports[8]" = "USB2_PORT_MID(OC3)" # Type-A Port A0
126 register "usb2_ports[9]" = "USB2_PORT_MID(OC_SKIP)" # M.2 Bluetooth
127
128 register "usb3_ports[0]" = "USB3_PORT_DEFAULT(OC3)" # USB3/2 Type A port A0
129 register "usb3_ports[1]" = "USB3_PORT_DEFAULT(OC_SKIP)" # DCI port
130 register "usb3_ports[2]" = "USB3_PORT_EMPTY" # Disable USB3 Port 2
131 register "usb3_ports[3]" = "USB3_PORT_DEFAULT(OC2)" # USB3/2 Type A port A1
132
133 register "tcss_ports[1]" = "TCSS_PORT_EMPTY"
134
135 register "tcc_offset" = "5" # TCC of 100
136
137 register "power_limits_config[RPL_P_282_242_142_15W_CORE]" = "{
138 .tdp_pl1_override = 17,
139 .tdp_pl2_override = 55,
140 .tdp_pl4 = 114,
141 }"
142
143 device domain 0 on
144 device ref igpu on
145 chip drivers/gfx/generic
146 register "device_count" = "6"
147 # DDIA for eDP
148 register "device[0].name" = ""LCD0""
149 # Internal panel on the first port of the graphics chip
150 register "device[0].type" = "panel"
151 # DDIB for HDMI
152 register "device[1].name" = ""DD01""
153 # TCP0 (DP-1) for port C0
154 register "device[2].name" = ""DD02""
155 register "device[2].use_pld" = "true"
156 register "device[2].pld" = "ACPI_PLD_TYPE_C(RIGHT, RIGHT, ACPI_PLD_GROUP(1, 1))"
157 # TCP1 (DP-2) is unused for any ports but still enumerated in the kernel, so GFX device is added for TCP1
158 register "device[3].name" = ""DD03""
159 # TCP2 (DP-3) for port C1
160 register "device[4].name" = ""DD04""
161 register "device[4].use_pld" = "true"
162 register "device[4].pld" = "ACPI_PLD_TYPE_C(LEFT, LEFT, ACPI_PLD_GROUP(2, 1))"
163 # TCP3 (DP-4) is unused for any ports but still enumerated in the kernel, so GFX device is added for TCP3
164 register "device[5].name" = ""DD05""
165 device generic 0 on end
166 end
167 end # Integrated Graphics Device
168 device ref dtt on
169 chip drivers/intel/dptf
170 ## sensor information
171 register "options.tsr[0].desc" = ""Charge""
172 register "options.tsr[1].desc" = ""5V""
173 register "options.tsr[2].desc" = ""AMB""
174 register "options.tsr[3].desc" = ""CPU Power""
175
176 # TODO: below values are initial reference values only
177 ## Active Policy
178 register "policies.active" = "{
179 [0] = {
180 .target = DPTF_CPU,
181 .thresholds = {
182 TEMP_PCT(90, 100),
183 TEMP_PCT(58, 70),
184 TEMP_PCT(55, 65),
185 TEMP_PCT(53, 60),
186 TEMP_PCT(50, 58),
187 TEMP_PCT(48, 54),
188 TEMP_PCT(43, 47),
189 TEMP_PCT(38, 42),
190 TEMP_PCT(35, 37),
191 TEMP_PCT(33, 0),
192 }
193 },
194 }"
195
196 ## Critical Policy
197 register "policies.critical" = "{
198 [0] = DPTF_CRITICAL(CPU, 105, SHUTDOWN),
199 [1] = DPTF_CRITICAL(TEMP_SENSOR_0, 80, SHUTDOWN),
200 [2] = DPTF_CRITICAL(TEMP_SENSOR_1, 70, SHUTDOWN),
201 [3] = DPTF_CRITICAL(TEMP_SENSOR_2, 65, SHUTDOWN),
202 [4] = DPTF_CRITICAL(TEMP_SENSOR_3, 90, SHUTDOWN),
203 }"
204
205 register "controls.power_limits" = "{
206 .pl1 = {
207 .min_power = 15000,
208 .max_power = 15000,
209 .time_window_min = 28 * MSECS_PER_SEC,
210 .time_window_max = 32 * MSECS_PER_SEC,
211 .granularity = 200,
212 },
213 .pl2 = {
214 .min_power = 55000,
215 .max_power = 55000,
216 .time_window_min = 28 * MSECS_PER_SEC,
217 .time_window_max = 32 * MSECS_PER_SEC,
218 .granularity = 1000,
219 }
220 }"
221
222 ## Charger Performance Control (Control, mA)
223 register "controls.charger_perf" = "{
224 [0] = { 36, 2300 },
225 [1] = { 31, 2000 },
226 [2] = { 26, 1700 },
227 [3] = { 20, 1300 }
228 }"
229
230 ## Fan Performance Control (Percent, Speed, Noise, Power)
231 register "controls.fan_perf" = "{
232 [0] = { 90, 6700, 220, 2200, },
233 [1] = { 80, 5800, 180, 1800, },
234 [2] = { 70, 5000, 145, 1450, },
235 [3] = { 60, 4900, 115, 1150, },
236 [4] = { 50, 3838, 90, 900, },
237 [5] = { 40, 2904, 55, 550, },
238 [6] = { 30, 2337, 30, 300, },
239 [7] = { 20, 1608, 15, 150, },
240 [8] = { 10, 800, 10, 100, },
241 [9] = { 0, 0, 0, 50, }
242 }"
243
244 ## Fan options
245 register "options.fan.fine_grained_control" = "1"
246 register "options.fan.step_size" = "2"
247
248 device generic 0 alias dptf_policy on end
249 end
250 end
251 device ref i2c0 on
252 chip drivers/i2c/generic
253 register "hid" = ""10EC5682""
254 register "name" = ""RT58""
255 register "desc" = ""Headset Codec""
256 register "irq_gpio" = "ACPI_GPIO_IRQ_EDGE_BOTH(GPP_A23)"
257 # Set the jd_src to RT5668_JD1 for jack detection
258 register "property_count" = "1"
259 register "property_list[0].type" = "ACPI_DP_TYPE_INTEGER"
260 register "property_list[0].name" = ""realtek,jd-src""
261 register "property_list[0].integer" = "1"
262 device i2c 1a on
263 probe AUDIO AUDIO_UNKNOWN
264 probe AUDIO ALC1019_ALC5682I_VD_I2S
265 end
266 end
267 chip drivers/i2c/generic
268 register "hid" = ""RTL5682""
269 register "name" = ""RT58""
270 register "desc" = ""Headset Codec""
271 register "irq_gpio" = "ACPI_GPIO_IRQ_EDGE_BOTH(GPP_A23)"
272 # Set the jd_src to RT5668_JD1 for jack detection
273 register "property_count" = "1"
274 register "property_list[0].type" = "ACPI_DP_TYPE_INTEGER"
275 register "property_list[0].name" = ""realtek,jd-src""
276 register "property_list[0].integer" = "1"
277 device i2c 1a on
278 probe AUDIO ALC1019_ALC5682I_VS_I2S
279 end
280 end
281 chip drivers/generic/alc1015
282 register "hid" = ""RTL1019""
283 register "sdb" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_A11)"
284 device generic 1 on end
285 end
286 end #I2C0
287 device ref i2c1 on
288 chip drivers/i2c/tpm
289 register "hid" = ""GOOG0005""
290 register "irq" = "ACPI_IRQ_EDGE_LOW(GPP_A13_IRQ)"
291 device i2c 50 on end
292 end
293 end #I2C1
294 device ref i2c3 on
295 chip drivers/i2c/generic
296 register "hid" = ""ELAN0001""
297 register "desc" = ""ELAN Touchscreen""
298 register "irq" = "ACPI_IRQ_LEVEL_LOW(GPP_C7_IRQ)"
299 register "detect" = "1"
300 register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C1)"
301 register "reset_delay_ms" = "150"
302 register "reset_off_delay_ms" = "1"
303 register "enable_gpio" =
304 "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_C0)"
305 register "enable_delay_ms" = "6"
306 register "stop_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C6)"
307 register "stop_off_delay_ms" = "1"
308 register "has_power_resource" = "1"
309 device i2c 10 on
310 probe TOUCH TOUCH_ELAN0001
311 end
312 end
313 end #I2C3
314 device ref i2c5 on
315 chip drivers/i2c/hid
316 register "generic.hid" = ""PIXA2342""
317 register "generic.desc" = ""PIXA Touchpad""
318 register "generic.irq" = "ACPI_IRQ_WAKE_LEVEL_LOW(GPP_F14_IRQ)"
319 register "generic.wake" = "GPE0_DW2_14"
320 register "hid_desc_reg_offset" = "0x1"
321 device i2c 15 on end
322 end
323 end #I2C5
324 device ref pcie_rp5 on
325 # Enable wlan PCIe 5 using clk 2
326 register "pch_pcie_rp[PCH_RP(5)]" = "{
327 .clk_src = 2,
328 .clk_req = 2,
329 .flags = PCIE_RP_LTR | PCIE_RP_AER,
330 }"
331 chip drivers/wifi/generic
332 register "add_acpi_dma_property" = "true"
333 device pci 00.0 on end
334 end
335 end
336 device ref pcie_rp8 off end
337 device ref pcie_rp11 on
338 # Enable NVMe SSD PCIe 11-12 using clk 1
339 register "pch_pcie_rp[PCH_RP(11)]" = "{
340 .clk_src = 1,
341 .clk_req = 1,
342 .flags = PCIE_RP_LTR | PCIE_RP_AER,
343 }"
344 probe STORAGE STORAGE_UNKNOWN
345 probe STORAGE STORAGE_NVME
346 end
347 device ref ish on
348 chip drivers/intel/ish
349 register "add_acpi_dma_property" = "true"
350 device generic 0 on end
351 end
352 probe STORAGE STORAGE_UFS
353 end
354 device ref ufs on
355 probe STORAGE STORAGE_UFS
356 end
357 device ref gspi1 on
358 chip drivers/spi/acpi
359 register "name" = ""CRFP""
360 register "hid" = "ACPI_DT_NAMESPACE_HID"
361 register "uid" = "1"
362 register "compat_string" = ""google,cros-ec-spi""
363 register "irq" = "ACPI_IRQ_WAKE_LEVEL_LOW(GPP_F15_IRQ)"
364 register "wake" = "GPE0_DW2_15"
365 register "has_power_resource" = "1"
366 register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_D1)"
367 register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_D2)"
368 register "enable_delay_ms" = "3"
369 device spi 0 hidden end
370 end # FPMCU
371 end
372 device ref pch_espi on
373 chip ec/google/chromeec
374 use conn0 as mux_conn[0]
375 use conn1 as mux_conn[1]
376 device pnp 0c09.0 on end
377 end
378 end
379 device ref pmc hidden
380 chip drivers/intel/pmc_mux
381 device generic 0 on
382 chip drivers/intel/pmc_mux/conn
383 use usb2_port1 as usb2_port
384 use tcss_usb3_port1 as usb3_port
385 device generic 0 alias conn0 on end
386 end
387 chip drivers/intel/pmc_mux/conn
388 use usb2_port3 as usb2_port
389 use tcss_usb3_port3 as usb3_port
390 device generic 1 alias conn1 on end
391 end
392 end
393 end
394 end
395 device ref tcss_xhci on
396 chip drivers/usb/acpi
397 device ref tcss_root_hub on
398 chip drivers/usb/acpi
399 register "desc" = ""USB3 Type-C Port C0 (MLB)""
400 register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
401 register "use_custom_pld" = "true"
402 register "custom_pld" = "ACPI_PLD_TYPE_C(RIGHT, RIGHT, ACPI_PLD_GROUP(1, 1))"
403 device ref tcss_usb3_port1 on end
404 end
405 chip drivers/usb/acpi
406 register "desc" = ""USB3 Type-C Port C2 (DB)""
407 register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
408 register "use_custom_pld" = "true"
409 register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, LEFT, ACPI_PLD_GROUP(2, 1))"
410 register "usb_lpm_incapable" = "true"
411 device ref tcss_usb3_port3 on end
412 end
413 end
414 end
415 end
416 device ref xhci on
417 chip drivers/usb/acpi
418 device ref xhci_root_hub on
419 chip drivers/usb/acpi
420 register "desc" = ""USB2 Type-C Port C0 (MLB)""
421 register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
422 register "use_custom_pld" = "true"
423 register "custom_pld" = "ACPI_PLD_TYPE_C(RIGHT, RIGHT, ACPI_PLD_GROUP(1, 1))"
424 device ref usb2_port1 on end
425 end
426 chip drivers/usb/acpi
427 register "desc" = ""USB2 Type-C Port C2 (DB)""
428 register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
429 register "use_custom_pld" = "true"
430 register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, LEFT, ACPI_PLD_GROUP(2, 1))"
431 device ref usb2_port3 on end
432 end
433 chip drivers/usb/acpi
434 register "desc" = ""USB2 Type-A Port A1 (MLB)""
435 register "type" = "UPC_TYPE_A"
436 register "use_custom_pld" = "true"
437 register "custom_pld" = "ACPI_PLD_TYPE_A(RIGHT, RIGHT, ACPI_PLD_GROUP(2, 2))"
438 device ref usb2_port4 on end
439 end
440 chip drivers/usb/acpi
441 register "desc" = ""USB2 Camera""
442 register "type" = "UPC_TYPE_INTERNAL"
443 device ref usb2_port6 on end
444 end
445 chip drivers/usb/acpi
446 register "desc" = ""USB2 Type-A Port A0 (MLB)""
447 register "type" = "UPC_TYPE_A"
448 register "use_custom_pld" = "true"
449 register "custom_pld" = "ACPI_PLD_TYPE_A(RIGHT, RIGHT, ACPI_PLD_GROUP(1, 2))"
450 device ref usb2_port9 on end
451 end
452 chip drivers/usb/acpi
453 register "desc" = ""USB2 Bluetooth""
454 register "type" = "UPC_TYPE_INTERNAL"
455 register "reset_gpio" =
456 "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_D4)"
457 device ref usb2_port10 on end
458 end
459 chip drivers/usb/acpi
460 register "desc" = ""USB3 Type-A Port A0 (MLB)""
461 register "type" = "UPC_TYPE_USB3_A"
462 register "use_custom_pld" = "true"
463 register "custom_pld" = "ACPI_PLD_TYPE_A(RIGHT, RIGHT, ACPI_PLD_GROUP(1, 2))"
464 device ref usb3_port1 on end
465 end
466 chip drivers/usb/acpi
467 register "desc" = ""USB3 Type-A Port A1 (MLB)""
468 register "type" = "UPC_TYPE_USB3_A"
469 register "use_custom_pld" = "true"
470 register "custom_pld" = "ACPI_PLD_TYPE_A(RIGHT, RIGHT, ACPI_PLD_GROUP(2, 2))"
471 device ref usb3_port4 on end
472 end
473 end
474 end
475 end
476 end
477 end
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