mb/google/brya/var/orisa: Update Type C DisplayPort HPD Configuration
[coreboot2.git] / src / mainboard / google / brya / variants / moli / memory.c
blob3ac4bb8c69c94e770a4bab1d6c8220578208fe18
1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 #include <baseboard/gpio.h>
4 #include <baseboard/variants.h>
5 #include <gpio.h>
6 #include <soc/romstage.h>
8 static const struct mb_cfg ddr4_mem_config = {
9 .type = MEM_TYPE_DDR4,
11 .rcomp = {
12 /* Baseboard uses only 100ohm Rcomp resistors */
13 .resistor = 100,
15 /* Baseboard Rcomp target values */
16 .targets = {50, 20, 25, 25, 25},
19 .LpDdrDqDqsReTraining = 1,
21 .ect = 1, /* Early Command Training */
23 .UserBd = BOARD_TYPE_MOBILE,
25 .ddr_config = {
26 .dq_pins_interleaved = false,
30 const struct mb_cfg *variant_memory_params(void)
32 return &ddr4_mem_config;