mb/google/brya/var/orisa: Update Type C DisplayPort HPD Configuration
[coreboot2.git] / src / mainboard / google / brya / variants / osiris / fw_config.c
blobf3ddb1e28b8ec4a007e01d59fe608a941be71680
1 /* SPDX-License-Identifier: GPL-2.0-only */
3 #include <bootstate.h>
4 #include <console/console.h>
5 #include <fw_config.h>
6 #include <gpio.h>
8 static const struct pad_config dmic_enable_pads[] = {
9 PAD_CFG_NF(GPP_R4, NONE, DEEP, NF3), /* DMIC_CLK0_R */
10 PAD_CFG_NF(GPP_R5, NONE, DEEP, NF3), /* DMIC_DATA0_R */
11 PAD_CFG_NF(GPP_R6, NONE, DEEP, NF3), /* DMIC_CLK1_R */
12 PAD_CFG_NF(GPP_R7, NONE, DEEP, NF3), /* DMIC_DATA1_R */
15 static const struct pad_config dmic_disable_pads[] = {
16 PAD_NC(GPP_R4, NONE),
17 PAD_NC(GPP_R5, NONE),
18 PAD_NC(GPP_R6, NONE),
19 PAD_NC(GPP_R7, NONE),
22 static const struct pad_config i2s_enable_pads[] = {
23 PAD_CFG_NF(GPP_R0, NONE, DEEP, NF2), /* I2S_HP_SCLK_R */
24 PAD_CFG_NF(GPP_R1, NONE, DEEP, NF2), /* I2S_HP_SFRM_R */
25 PAD_CFG_NF(GPP_R2, DN_20K, DEEP, NF2), /* I2S_PCH_TX_HP_RX_STRAP */
26 PAD_CFG_NF(GPP_R3, NONE, DEEP, NF2), /* I2S_PCH_RX_HP_TX */
27 PAD_CFG_NF(GPP_S0, NONE, DEEP, NF4), /* I2S_SPKR_SCLK_R */
28 PAD_CFG_NF(GPP_S1, NONE, DEEP, NF4), /* I2S_SPKR_SFRM_R */
29 PAD_CFG_NF(GPP_S2, NONE, DEEP, NF4), /* I2S_PCH_TX_SPKR_RX_R */
30 PAD_CFG_NF(GPP_S3, NONE, DEEP, NF4), /* I2S_PCH_RX_SPKR_TX */
33 static const struct pad_config i2s_disable_pads[] = {
34 PAD_NC(GPP_R0, NONE),
35 PAD_NC(GPP_R1, NONE),
36 PAD_NC(GPP_R2, NONE),
37 PAD_NC(GPP_R3, NONE),
38 PAD_NC(GPP_S0, NONE),
39 PAD_NC(GPP_S1, NONE),
40 PAD_NC(GPP_S2, NONE),
41 PAD_NC(GPP_S3, NONE),
44 static const struct pad_config bt_i2s_enable_pads[] = {
45 PAD_CFG_NF(GPP_VGPIO_30, NONE, DEEP, NF3), /* BT_I2S_BCLK */
46 PAD_CFG_NF(GPP_VGPIO_31, NONE, DEEP, NF3), /* BT_I2S_SYNC */
47 PAD_CFG_NF(GPP_VGPIO_32, NONE, DEEP, NF3), /* BT_I2S_SDO */
48 PAD_CFG_NF(GPP_VGPIO_33, NONE, DEEP, NF3), /* BT_I2S_SDI */
49 PAD_CFG_NF(GPP_VGPIO_34, NONE, DEEP, NF1), /* SSP2_SCLK */
50 PAD_CFG_NF(GPP_VGPIO_35, NONE, DEEP, NF1), /* SSP2_SFRM */
51 PAD_CFG_NF(GPP_VGPIO_36, NONE, DEEP, NF1), /* SSP_TXD */
52 PAD_CFG_NF(GPP_VGPIO_37, NONE, DEEP, NF1), /* SSP_RXD */
55 static const struct pad_config bt_i2s_disable_pads[] = {
56 PAD_NC(GPP_VGPIO_30, NONE),
57 PAD_NC(GPP_VGPIO_31, NONE),
58 PAD_NC(GPP_VGPIO_32, NONE),
59 PAD_NC(GPP_VGPIO_33, NONE),
60 PAD_NC(GPP_VGPIO_34, NONE),
61 PAD_NC(GPP_VGPIO_35, NONE),
62 PAD_NC(GPP_VGPIO_36, NONE),
63 PAD_NC(GPP_VGPIO_37, NONE),
66 static void fw_config_handle(void *unused)
68 if (!fw_config_is_provisioned() || fw_config_probe(FW_CONFIG(AUDIO, AUDIO_UNKNOWN))) {
69 printk(BIOS_INFO, "Disable audio related GPIO pins.\n");
70 gpio_configure_pads(i2s_disable_pads, ARRAY_SIZE(i2s_disable_pads));
71 gpio_configure_pads(dmic_disable_pads, ARRAY_SIZE(dmic_disable_pads));
72 gpio_configure_pads(bt_i2s_disable_pads, ARRAY_SIZE(bt_i2s_disable_pads));
73 return;
76 if (fw_config_probe(FW_CONFIG(AUDIO, MAX98360_NAU88L25B_I2S))) {
77 printk(BIOS_INFO, "Configure audio over I2S with MAX98360 NAU88L25B.\n");
78 gpio_configure_pads(dmic_enable_pads, ARRAY_SIZE(dmic_enable_pads));
79 gpio_configure_pads(i2s_enable_pads, ARRAY_SIZE(i2s_enable_pads));
80 printk(BIOS_INFO, "BT offload enabled\n");
81 gpio_configure_pads(bt_i2s_enable_pads, ARRAY_SIZE(bt_i2s_enable_pads));
82 } else {
83 printk(BIOS_INFO, "BT offload disabled\n");
84 gpio_configure_pads(bt_i2s_disable_pads, ARRAY_SIZE(bt_i2s_disable_pads));
87 BOOT_STATE_INIT_ENTRY(BS_DEV_ENABLE, BS_ON_ENTRY, fw_config_handle, NULL);