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mb/google/brya/var/orisa: Update Type C DisplayPort HPD Configuration
[coreboot2.git] / src / mainboard / google / brya / variants / telith / overridetree.cb
blob4f1b16e5c0e7288efd6c757e15f2418ac8d495ec
1 fw_config
2 field WIFI 8 9
3 option UNKNOWN 0
4 option WIFI_6_7921 1
5 option WIFI_6E 2
6 option WIFI_6_8852 3
7 end
8 field CAMERA 10 11
9 option UF_720P_WF 0
10 option UF_1080P 1
11 option UF_720P 2
12 option UF_1080P_WF 3
13 end
14 field THERMAL_SOLUTION 19 19
15 option THERMAL_SOLUTION_6W 0
16 option THERMAL_SOLUTION_15W 1
17 end
18 end
19
20 chip soc/intel/alderlake
21 register "sagv" = "SaGv_Enabled"
22
23 # EMMC Tx CMD Delay
24 # Refer to EDS-Vol2-42.3.7.
25 # [14:8] steps of delay for DDR mode, each 125ps, range: 0 - 39.
26 # [6:0] steps of delay for SDR mode, each 125ps, range: 0 - 39.
27 register "common_soc_config.emmc_dll.emmc_tx_cmd_cntl" = "0x505"
28
29 # EMMC TX DATA Delay 1
30 # Refer to EDS-Vol2-42.3.8.
31 # [14:8] steps of delay for HS400, each 125ps, range: 0 - 78.
32 # [6:0] steps of delay for SDR104/HS200, each 125ps, range: 0 - 79.
33 register "common_soc_config.emmc_dll.emmc_tx_data_cntl1" = "0x909"
34
35 # EMMC TX DATA Delay 2
36 # Refer to EDS-Vol2-42.3.9.
37 # [30:24] steps of delay for SDR50, each 125ps, range: 0 - 79.
38 # [22:16] steps of delay for DDR50, each 125ps, range: 0 - 78.
39 # [14:8] steps of delay for SDR25/HS50, each 125ps, range: 0 -79.
40 # [6:0] steps of delay for SDR12, each 125ps. Range: 0 - 79.
41 register "common_soc_config.emmc_dll.emmc_tx_data_cntl2" = "0x1C2A2828"
42
43 # EMMC RX CMD/DATA Delay 1
44 # Refer to EDS-Vol2-42.3.10.
45 # [30:24] steps of delay for SDR50, each 125ps, range: 0 - 119.
46 # [22:16] steps of delay for DDR50, each 125ps, range: 0 - 78.
47 # [14:8] steps of delay for SDR25/HS50, each 125ps, range: 0 - 119.
48 # [6:0] steps of delay for SDR12, each 125ps, range: 0 - 119.
49 register "common_soc_config.emmc_dll.emmc_rx_cmd_data_cntl1" = "0x1C1B4F1B"
50
51 # EMMC RX CMD/DATA Delay 2
52 # Refer to EDS-Vol2-42.3.12.
53 # [17:16] stands for Rx Clock before Output Buffer,
54 # 00: Rx clock after output buffer,
55 # 01: Rx clock before output buffer,
56 # 10: Automatic selection based on working mode.
57 # 11: Reserved
58 # [14:8] steps of delay for Auto Tuning Mode, each 125ps, range: 0 - 39.
59 # [6:0] steps of delay for HS200, each 125ps, range: 0 - 79.
60 register "common_soc_config.emmc_dll.emmc_rx_cmd_data_cntl2" = "0x1004C"
61
62 # EMMC Rx Strobe Delay
63 # Refer to EDS-Vol2-42.3.11.
64 # [14:8] Rx Strobe Delay DLL 1(HS400 Mode), each 125ps, range: 0 - 39.
65 # [6:0] Rx Strobe Delay DLL 2(HS400 Mode), each 125ps, range: 0 - 39.
66 register "common_soc_config.emmc_dll.emmc_rx_strobe_cntl" = "0x01515"
67
68 # SOC Aux orientation override:
69 # This is a bitfield that corresponds to up to 4 TCSS ports.
70 # Bits (0,1) allocated for TCSS Port1 configuration and Bits (2,3)for TCSS Port2.
71 # TcssAuxOri = 0100b
72 # Bit0 set to "0" indicates has retimer on USBC Port0, on the DB.
73 # Bit2 set to "1" indicates no retimer on USBC Port1, on the MB.
74 # Bit1,Bit3 set to "0" indicates Aux lines are not swapped on the
75 # motherboard to USBC connector
76 register "tcss_aux_ori" = "5"
77
78 register "typec_aux_bias_pads[0]" = "{
79 .pad_auxp_dc = GPP_A19,
80 .pad_auxn_dc = GPP_A20
81 }"
82
83 register "typec_aux_bias_pads[1]" = "{
84 .pad_auxp_dc = GPP_E22,
85 .pad_auxn_dc = GPP_E23
86 }"
87
88 # FIVR configurations for teliks are disabled since the board doesn't have V1p05 and Vnn
89 # bypass rails implemented.
90 register "ext_fivr_settings" = "{
91 .configure_ext_fivr = 0,
92 }"
93
94 # Enable the Cnvi BT Audio Offload
95 register "cnvi_bt_audio_offload" = "1"
96
97 # Intel Common SoC Config
98 #+-------------+------------------------------+
99 #| Field | Value |
100 #+-------------+------------------------------+
101 #| I2C0 | TPM. Early init is |
102 #| | required to set up a BAR |
103 #| | for TPM communication |
104 #| I2C1 | Touchscreen |
105 #| I2C2 | Sub-board(PSensor)/WCAM |
106 #| I2C3 | Audio |
107 #| I2C5 | Trackpad |
108 #+-------------+------------------------------+
109 register "common_soc_config" = "{
110 .i2c[0] = {
111 .early_init = 1,
112 .speed = I2C_SPEED_FAST_PLUS,
113 .speed_config[0] = {
114 .speed = I2C_SPEED_FAST_PLUS,
115 .scl_lcnt = 55,
116 .scl_hcnt = 30,
117 .sda_hold = 7,
118 }
119 },
120 .i2c[1] = {
121 .speed = I2C_SPEED_FAST,
122 .speed_config[0] = {
123 .speed = I2C_SPEED_FAST,
124 .scl_lcnt = 160,
125 .scl_hcnt = 79,
126 .sda_hold = 7,
127 }
128 },
129 .i2c[2] = {
130 .speed = I2C_SPEED_FAST,
131 .speed_config[0] = {
132 .speed = I2C_SPEED_FAST,
133 .scl_lcnt = 157,
134 .scl_hcnt = 79,
135 .sda_hold = 7,
136 }
137 },
138 .i2c[3] = {
139 .speed = I2C_SPEED_FAST,
140 .speed_config[0] = {
141 .speed = I2C_SPEED_FAST,
142 .scl_lcnt = 157,
143 .scl_hcnt = 79,
144 .sda_hold = 7,
145 }
146 },
147 .i2c[5] = {
148 .speed = I2C_SPEED_FAST,
149 .speed_config[0] = {
150 .speed = I2C_SPEED_FAST,
151 .scl_lcnt = 152,
152 .scl_hcnt = 79,
153 .sda_hold = 7,
154 }
155 },
156 }"
157
158 # Power limit config
159 register "power_limits_config[ADL_N_041_6W_CORE]" = "{
160 .tdp_pl1_override = 15,
161 .tdp_pl2_override = 20,
162 .tdp_pl4 = 78,
163 }"
164 register "power_limits_config[ADL_N_081_15W_CORE]" = "{
165 .tdp_pl1_override = 20,
166 .tdp_pl2_override = 35,
167 .tdp_pl4 = 83,
168 }"
169
170 device domain 0 on
171 device ref dtt on
172 chip drivers/intel/dptf
173 ## sensor information
174 register "options.tsr[0].desc" = ""CPU""
175 register "options.tsr[1].desc" = ""5V Regulator""
176 register "options.tsr[2].desc" = ""Ambient""
177 register "options.tsr[3].desc" = ""Charger""
178
179 # TODO: below values are initial reference values only
180 ## Passive Policy
181 register "policies.passive" = "{
182 [0] = DPTF_PASSIVE(CPU, CPU, 85, 6000),
183 [1] = DPTF_PASSIVE(CPU, TEMP_SENSOR_0, 85, 6000),
184 [2] = DPTF_PASSIVE(CPU, TEMP_SENSOR_1, 85, 6000),
185 [3] = DPTF_PASSIVE(CPU, TEMP_SENSOR_2, 85, 5000),
186 [4] = DPTF_PASSIVE(CHARGER, TEMP_SENSOR_3, 85, 6000),
187 }"
188
189 ## Critical Policy
190 register "policies.critical" = "{
191 [0] = DPTF_CRITICAL(TEMP_SENSOR_1, 90, SHUTDOWN),
192 [1] = DPTF_CRITICAL(TEMP_SENSOR_2, 90, SHUTDOWN),
193 }"
194
195 register "controls.power_limits" = "{
196 .pl1 = {
197 .min_power = 6000,
198 .max_power = 15000,
199 .time_window_min = 28 * MSECS_PER_SEC,
200 .time_window_max = 32 * MSECS_PER_SEC,
201 .granularity = 200
202 },
203 .pl2 = {
204 .min_power = 20000,
205 .max_power = 20000,
206 .time_window_min = 28 * MSECS_PER_SEC,
207 .time_window_max = 32 * MSECS_PER_SEC,
208 .granularity = 1000
209 }
210 }"
211
212 ## Charger Performance Control (Control, mA)
213 register "controls.charger_perf" = "{
214 [0] = { 255, 3000 },
215 [1] = { 24, 1500 },
216 [2] = { 16, 1000 },
217 [3] = { 8, 500 }
218 }"
219
220 device generic 0 on
221 probe THERMAL_SOLUTION THERMAL_SOLUTION_6W
222 end
223 end
224
225 chip drivers/intel/dptf
226 ## sensor information
227 register "options.tsr[0].desc" = ""CPU""
228 register "options.tsr[1].desc" = ""5V Regulator""
229 register "options.tsr[2].desc" = ""Ambient""
230 register "options.tsr[3].desc" = ""Charger""
231
232 # TODO: below values are initial reference values only
233 ## Active Policy
234 register "policies.active" = "{
235 [0] = {
236 .target = DPTF_TEMP_SENSOR_0,
237 .thresholds = {
238 TEMP_PCT(85, 90),
239 TEMP_PCT(54, 64),
240 TEMP_PCT(52, 52),
241 TEMP_PCT(50, 44),
242 TEMP_PCT(48, 38),
243 TEMP_PCT(45, 34),
244 }
245 },
246 [1] = {
247 .target = DPTF_TEMP_SENSOR_1,
248 .thresholds = {
249 TEMP_PCT(75, 90),
250 TEMP_PCT(70, 80),
251 TEMP_PCT(65, 70),
252 TEMP_PCT(60, 60),
253 TEMP_PCT(55, 50),
254 TEMP_PCT(50, 40),
255 }
256 },
257 [2] = {
258 .target = DPTF_TEMP_SENSOR_2,
259 .thresholds = {
260 TEMP_PCT(90, 90),
261 TEMP_PCT(85, 80),
262 TEMP_PCT(75, 70),
263 TEMP_PCT(70, 50),
264 }
265 },
266 [3] = {
267 .target = DPTF_TEMP_SENSOR_3,
268 .thresholds = {
269 TEMP_PCT(80, 90),
270 TEMP_PCT(75, 80),
271 TEMP_PCT(70, 70),
272 TEMP_PCT(65, 50),
273 }
274 }
275 }"
276 ## Passive Policy
277 register "policies.passive" = "{
278 [0] = DPTF_PASSIVE(CPU, CPU, 85, 6000),
279 [1] = DPTF_PASSIVE(CPU, TEMP_SENSOR_0, 85, 6000),
280 [2] = DPTF_PASSIVE(CPU, TEMP_SENSOR_1, 85, 6000),
281 [3] = DPTF_PASSIVE(CPU, TEMP_SENSOR_2, 85, 6000),
282 [4] = DPTF_PASSIVE(CHARGER, TEMP_SENSOR_3, 85, 6000),
283 }"
284
285 ## Critical Policy
286 register "policies.critical" = "{
287 [0] = DPTF_CRITICAL(TEMP_SENSOR_1, 90, SHUTDOWN),
288 [1] = DPTF_CRITICAL(TEMP_SENSOR_2, 90, SHUTDOWN),
289 }"
290
291 register "controls.power_limits" = "{
292 .pl1 = {
293 .min_power = 15000,
294 .max_power = 20000,
295 .time_window_min = 28 * MSECS_PER_SEC,
296 .time_window_max = 32 * MSECS_PER_SEC,
297 .granularity = 200
298 },
299 .pl2 = {
300 .min_power = 35000,
301 .max_power = 35000,
302 .time_window_min = 28 * MSECS_PER_SEC,
303 .time_window_max = 32 * MSECS_PER_SEC,
304 .granularity = 1000
305 }
306 }"
307
308 ## Charger Performance Control (Control, mA)
309 register "controls.charger_perf" = "{
310 [0] = { 255, 3000 },
311 [1] = { 24, 2000 },
312 [2] = { 16, 1000 },
313 [3] = { 8, 500 }
314 }"
315
316 ## Fan Performance Control (Percent, Speed, Noise, Power)
317 register "controls.fan_perf" = "{
318 [0] = { 100, 4000, 220, 1640, },
319 [1] = { 90, 3700, 220, 1640, },
320 [2] = { 80, 3500, 180, 1310, },
321 [3] = { 70, 3300, 145, 1030, },
322 [4] = { 60, 3100, 115, 765, },
323 [5] = { 50, 2800, 90, 545, },
324 [6] = { 40, 2500, 55, 365, },
325 [7] = { 30, 2100, 30, 220, },
326 [8] = { 20, 1500, 15, 120, },
327 [9] = { 0, 0, 0, 50, }
328 }"
329
330 ## Fan options
331 register "options.fan.fine_grained_control" = "1"
332 register "options.fan.step_size" = "2"
333 device generic 1 on
334 probe THERMAL_SOLUTION THERMAL_SOLUTION_15W
335 end
336 end
337 end
338 device ref igpu on
339 chip drivers/gfx/generic
340 register "device_count" = "4"
341 # DDIA for eDP
342 register "device[0].name" = ""LCD0""
343 # Internal panel on the first port of the graphics chip
344 register "device[0].type" = "panel"
345 # DDIB for HDMI
346 # If HDMI is not enumerated in the kernel, then no GFX device should be added for DDIB
347 register "device[1].name" = ""DD01""
348 # TCP0 (DP-1) for port C0
349 register "device[2].name" = ""DD02""
350 register "device[2].use_pld" = "true"
351 register "device[2].pld" = "ACPI_PLD_TYPE_C(LEFT, RIGHT, ACPI_PLD_GROUP(1, 1))"
352 # TCP1 (DP-2) for port C1
353 register "device[3].name" = ""DD03""
354 register "device[3].use_pld" = "true"
355 register "device[3].pld" = "ACPI_PLD_TYPE_C(RIGHT, LEFT, ACPI_PLD_GROUP(2, 1))"
356 device generic 0 on end
357 end
358 end
359 device ref ipu on
360 chip drivers/intel/mipi_camera
361 register "acpi_uid" = "0x50000"
362 register "acpi_name" = ""IPU0""
363 register "device_type" = "INTEL_ACPI_CAMERA_CIO2"
364
365 register "cio2_num_ports" = "1"
366 register "cio2_lanes_used" = "{4}" # 4 CSI Camera lanes are used
367 register "cio2_lane_endpoint[0]" = ""^I2C2.CAM0""
368 register "cio2_prt[0]" = "1"
369 device generic 0 on
370 probe CAMERA UF_720P_WF
371 probe CAMERA UF_1080P_WF
372 end
373 end
374 end
375 device ref i2c1 on
376 chip drivers/i2c/generic
377 register "hid" = ""ELAN0001""
378 register "desc" = ""ELAN Touchscreen""
379 register "irq" = "ACPI_IRQ_LEVEL_LOW(GPP_C7_IRQ)"
380 register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C1)"
381 register "reset_delay_ms" = "20"
382 register "reset_off_delay_ms" = "4"
383 register "stop_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C6)"
384 register "stop_delay_ms" = "5"
385 register "stop_off_delay_ms" = "25"
386 register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_C0)"
387 register "enable_delay_ms" = "25"
388 register "has_power_resource" = "1"
389 device i2c 10 on end
390 end
391 chip drivers/generic/gpio_keys
392 register "name" = ""PENH""
393 register "gpio" = "ACPI_GPIO_INPUT_ACTIVE_LOW(GPP_F13)"
394 register "key.wake_gpe" = "GPE0_DW2_15"
395 register "key.wakeup_route" = "WAKEUP_ROUTE_SCI"
396 register "key.wakeup_event_action" = "EV_ACT_ANY"
397 register "key.dev_name" = ""EJCT""
398 register "key.linux_code" = "SW_PEN_INSERTED"
399 register "key.linux_input_type" = "EV_SW"
400 register "key.label" = ""pen_eject""
401 device generic 0 on end
402 end
403 end
404 device ref i2c2 on
405 chip drivers/intel/mipi_camera
406 register "acpi_hid" = ""OVTIDB10""
407 register "acpi_uid" = "0"
408 register "acpi_name" = ""CAM0""
409 register "chip_name" = ""Ov 13b10 Camera""
410 register "device_type" = "INTEL_ACPI_CAMERA_SENSOR"
411
412 register "ssdb.lanes_used" = "4"
413 register "ssdb.vcm_type" = "0x0C"
414 register "vcm_name" = ""VCM0""
415 register "num_freq_entries" = "1"
416 register "link_freq[0]" = "560 * MHz"
417 register "remote_name" = ""IPU0""
418
419 register "has_power_resource" = "1"
420 #Controls
421 register "clk_panel.clks[0].clknum" = "IMGCLKOUT_3"
422 register "clk_panel.clks[0].freq" = "FREQ_19_2_MHZ"
423
424 register "gpio_panel.gpio[0].gpio_num" = "GPP_D15" # EN_PP2800_WCAM_X
425 register "gpio_panel.gpio[1].gpio_num" = "GPP_D16" # EN_PP1200_WCAM_X
426 register "gpio_panel.gpio[2].gpio_num" = "GPP_D3" # WCAM_RST_L
427
428 #_ON
429 register "on_seq.ops_cnt" = "5"
430 register "on_seq.ops[0]" = "SEQ_OPS_CLK_ENABLE(0, 0)"
431 register "on_seq.ops[1]" = "SEQ_OPS_GPIO_ENABLE(0, 5)"
432 register "on_seq.ops[2]" = "SEQ_OPS_GPIO_ENABLE(1, 5)"
433 register "on_seq.ops[3]" = "SEQ_OPS_GPIO_DISABLE(2, 5)"
434 register "on_seq.ops[4]" = "SEQ_OPS_GPIO_ENABLE(2, 5)"
435
436 #_OFF
437 register "off_seq.ops_cnt" = "4"
438 register "off_seq.ops[0]" = "SEQ_OPS_CLK_DISABLE(0, 0)"
439 register "off_seq.ops[1]" = "SEQ_OPS_GPIO_DISABLE(2, 0)"
440 register "off_seq.ops[2]" = "SEQ_OPS_GPIO_DISABLE(1, 0)"
441 register "off_seq.ops[3]" = "SEQ_OPS_GPIO_DISABLE(0, 0)"
442
443 device i2c 36 on
444 probe CAMERA UF_720P_WF
445 probe CAMERA UF_1080P_WF
446 end
447 end
448 chip drivers/intel/mipi_camera
449 register "acpi_uid" = "2"
450 register "acpi_name" = ""VCM0""
451 register "chip_name" = ""DW9714 VCM ""
452 register "device_type" = "INTEL_ACPI_CAMERA_VCM"
453
454 register "vcm_compat" = ""dongwoon,dw9714""
455
456 register "has_power_resource" = "1"
457 #Controls
458 register "gpio_panel.gpio[0].gpio_num" = "GPP_D15" # EN_PP2800_AFVDD
459
460 #_ON
461 register "on_seq.ops_cnt" = "1"
462 register "on_seq.ops[0]" = "SEQ_OPS_GPIO_ENABLE(0, 5)"
463
464 #_OFF
465 register "off_seq.ops_cnt" = "1"
466 register "off_seq.ops[0]" = "SEQ_OPS_GPIO_DISABLE(0, 0)"
467
468 device i2c 0C on
469 probe CAMERA UF_720P_WF
470 probe CAMERA UF_1080P_WF
471 end
472 end
473 chip drivers/intel/mipi_camera
474 register "acpi_uid" = "1"
475 register "acpi_name" = ""NVM0""
476 register "chip_name" = ""GT24P64E""
477 register "device_type" = "INTEL_ACPI_CAMERA_NVM"
478
479 register "nvm_size" = "0x2000"
480 register "nvm_pagesize" = "1"
481 register "nvm_readonly" = "1"
482 register "nvm_width" = "0x10"
483 register "nvm_compat" = ""atmel,24c64""
484
485 device i2c 50 on
486 probe CAMERA UF_720P_WF
487 probe CAMERA UF_1080P_WF
488 end
489 end
490 end
491 device ref i2c3 on
492 chip drivers/i2c/rt5645
493 register "hid" = ""10EC5650""
494 register "name" = ""RT58""
495 register "desc" = ""Realtek RT5650""
496 register "irq_gpio" = "ACPI_GPIO_IRQ_EDGE_BOTH(GPP_A23)"
497 register "cbj_sleeve" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_A11)"
498 register "jd_mode" = "2"
499 device i2c 1a on end
500 end
501 end
502 device ref i2c5 on
503 chip drivers/i2c/hid
504 register "generic.hid" = ""PNP0C50""
505 register "generic.desc" = ""PRIMAX Touchpad""
506 register "generic.irq" = "ACPI_IRQ_WAKE_LEVEL_LOW(GPP_F14_IRQ)"
507 register "generic.wake" = "GPE0_DW2_14"
508 register "generic.detect" = "1"
509 register "hid_desc_reg_offset" = "0x01"
510 device i2c 15 on end
511 end
512 end
513 device ref cnvi_wifi on
514 chip drivers/wifi/generic
515 register "wake" = "GPE0_PME_B0"
516 register "enable_cnvi_ddr_rfim" = "true"
517 register "add_acpi_dma_property" = "true"
518 device generic 0 on
519 probe WIFI WIFI_6E
520 end
521 end
522 end
523 device ref pcie_rp4 on
524 # PCIe 4 WLAN
525 register "pch_pcie_rp[PCH_RP(4)]" = "{
526 .clk_src = 2,
527 .clk_req = 2,
528 .flags = PCIE_RP_LTR | PCIE_RP_AER,
529 }"
530 chip drivers/wifi/generic
531 register "wake" = "GPE0_DW1_03"
532 register "add_acpi_dma_property" = "true"
533 device pci 00.0 on
534 probe WIFI WIFI_6_7921
535 probe WIFI WIFI_6_8852
536 end
537 end
538 end
539 device ref pch_espi on
540 chip ec/google/chromeec
541 use conn0 as mux_conn[0]
542 use conn1 as mux_conn[1]
543 device pnp 0c09.0 on end
544 end
545 end
546 device ref pmc hidden
547 chip drivers/intel/pmc_mux
548 device generic 0 on
549 chip drivers/intel/pmc_mux/conn
550 use usb2_port1 as usb2_port
551 use tcss_usb3_port2 as usb3_port
552 device generic 0 alias conn0 on end
553 end
554 chip drivers/intel/pmc_mux/conn
555 use usb2_port2 as usb2_port
556 use tcss_usb3_port1 as usb3_port
557 device generic 1 alias conn1 on end
558 end
559 end
560 end
561 end
562 device ref tcss_xhci on
563 chip drivers/usb/acpi
564 device ref tcss_root_hub on
565 chip drivers/usb/acpi
566 register "desc" = ""USB3 Type-C Port C0 (MLB)""
567 register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
568 register "use_custom_pld" = "true"
569 register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, LEFT, ACPI_PLD_GROUP(1, 1))"
570 device ref tcss_usb3_port2 on end
571 end
572 chip drivers/usb/acpi
573 register "desc" = ""USB3 Type-C Port C1 (DB)""
574 register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
575 register "use_custom_pld" = "true"
576 register "custom_pld" = "ACPI_PLD_TYPE_C(RIGHT, RIGHT, ACPI_PLD_GROUP(2, 1))"
577 device ref tcss_usb3_port1 on end
578 end
579 end
580 end
581 end
582 device ref xhci on
583 register "usb2_ports[0]" = "USB2_PORT_TYPE_C(OC_SKIP)" # Type-C MB (7.5 inch)
584 register "usb2_ports[1]" = "USB2_PORT_TYPE_C(OC_SKIP)" # Type-C DB (7.1 inch)
585 register "usb2_ports[2]" = "USB2_PORT_MID(OC_SKIP)" # Type-A MB (6.4 inch)
586 register "usb2_ports[5]" = "USB2_PORT_SHORT(OC_SKIP)" # UFC (3.7 inch)
587 register "usb2_ports[7]" = "USB2_PORT_MID(OC_SKIP)" # Bluetooth port for PCIe WLAN (2.5 inch)
588 register "usb2_ports[9]" = "USB2_PORT_MID(OC_SKIP)" # Bluetooth port for CNVi WLAN
589
590 register "usb3_ports[0]" = "USB3_PORT_DEFAULT(OC_SKIP)" # USB3 Type-A port A0(MLB))
591 chip drivers/usb/acpi
592 device ref xhci_root_hub on
593 chip drivers/usb/acpi
594 register "desc" = ""USB2 Type-C Port C0 (MLB)""
595 register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
596 register "use_custom_pld" = "true"
597 register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, LEFT, ACPI_PLD_GROUP(1, 1))"
598 device ref usb2_port1 on end
599 end
600 chip drivers/usb/acpi
601 register "desc" = ""USB2 Type-C Port C1 (DB)""
602 register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
603 register "use_custom_pld" = "true"
604 register "custom_pld" = "ACPI_PLD_TYPE_C(RIGHT, RIGHT, ACPI_PLD_GROUP(2, 1))"
605 device ref usb2_port2 on end
606 end
607 chip drivers/usb/acpi
608 register "desc" = ""USB2 Type-A Port A0 (MLB)""
609 register "type" = "UPC_TYPE_A"
610 register "use_custom_pld" = "true"
611 register "custom_pld" = "ACPI_PLD_TYPE_A(LEFT, RIGHT, ACPI_PLD_GROUP(3, 1))"
612 device ref usb2_port3 on end
613 end
614 chip drivers/usb/acpi
615 register "desc" = ""USB2 UFC""
616 register "type" = "UPC_TYPE_INTERNAL"
617 device ref usb2_port6 on end
618 end
619 chip drivers/usb/acpi
620 register "desc" = ""PCIe Bluetooth""
621 register "type" = "UPC_TYPE_INTERNAL"
622 register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_D4)"
623 device ref usb2_port8 on
624 probe WIFI WIFI_6_7921
625 probe WIFI WIFI_6_8852
626 end
627 end
628 chip drivers/usb/acpi
629 register "desc" = ""CNVi Bluetooth""
630 register "type" = "UPC_TYPE_INTERNAL"
631 register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_D4)"
632 device ref usb2_port10 on
633 probe WIFI WIFI_6E
634 end
635 end
636 chip drivers/usb/acpi
637 register "desc" = ""USB3 Type-A Port A0 (MLB)""
638 register "type" = "UPC_TYPE_USB3_A"
639 register "use_custom_pld" = "true"
640 register "custom_pld" = "ACPI_PLD_TYPE_A(LEFT, RIGHT, ACPI_PLD_GROUP(3, 1))"
641 device ref usb3_port1 on end
642 end
643 chip drivers/usb/acpi
644 register "desc" = ""USB3 WLAN""
645 register "type" = "UPC_TYPE_INTERNAL"
646 device ref usb3_port4 on end
647 end
648 end
649 end
650 end
651 device ref pcie_rp7 off end # SDCard
652 device ref hda on
653 chip drivers/sof
654 register "spkr_tplg" = "rt5650_sp"
655 register "jack_tplg" = "rt5650_hp"
656 register "mic_tplg" = "_2ch_pdm0"
657 device generic 0 on end
658 end
659 end
660 end
661 end
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