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mb/google/brya/var/orisa: Update Type C DisplayPort HPD Configuration
[coreboot2.git] / src / mainboard / google / brya / variants / xivu / overridetree.cb
blobbe4d8dffe83058b35407c3013a787cb1cef27bd8
1 fw_config
2 field WFC 0
3 option WFC_PRESENT 0
4 option WFC_ABSENT 1
5 end
6 field STYLUS 1
7 option STYLUS_PRESENT 0
8 option STYLUS_ABSENT 1
9 end
10 field AUDIO_CODEC_SOURCE 8
11 option AUDIO_CODEC_ALC5682_VS 0
12 option AUDIO_CODEC_ALC5682_VD 1
13 end
14 end
15
16 chip soc/intel/alderlake
17 register "sagv" = "SaGv_Enabled"
18
19 # EMMC Tx CMD Delay
20 # Refer to EDS-Vol2-42.3.7.
21 # [14:8] steps of delay for DDR mode, each 125ps, range: 0 - 39.
22 # [6:0] steps of delay for SDR mode, each 125ps, range: 0 - 39.
23 register "common_soc_config.emmc_dll.emmc_tx_cmd_cntl" = "0x00000505"
24
25 # EMMC TX DATA Delay 1
26 # Refer to EDS-Vol2-42.3.8.
27 # [14:8] steps of delay for HS400, each 125ps, range: 0 - 78.
28 # [6:0] steps of delay for SDR104/HS200, each 125ps, range: 0 - 79.
29 register "common_soc_config.emmc_dll.emmc_tx_data_cntl1" = "0x00000a12"
30
31 # EMMC TX DATA Delay 2
32 # Refer to EDS-Vol2-42.3.9.
33 # [30:24] steps of delay for SDR50, each 125ps, range: 0 - 79.
34 # [22:16] steps of delay for DDR50, each 125ps, range: 0 - 78.
35 # [14:8] steps of delay for SDR25/HS50, each 125ps, range: 0 -79.
36 # [6:0] steps of delay for SDR12, each 125ps. Range: 0 - 79.
37 register "common_soc_config.emmc_dll.emmc_tx_data_cntl2" = "0x1c292828"
38
39 # EMMC RX CMD/DATA Delay 1
40 # Refer to EDS-Vol2-42.3.10.
41 # [30:24] steps of delay for SDR50, each 125ps, range: 0 - 119.
42 # [22:16] steps of delay for DDR50, each 125ps, range: 0 - 78.
43 # [14:8] steps of delay for SDR25/HS50, each 125ps, range: 0 - 119.
44 # [6:0] steps of delay for SDR12, each 125ps, range: 0 - 119.
45 register "common_soc_config.emmc_dll.emmc_rx_cmd_data_cntl1" = "0x1c175a3b"
46
47 # EMMC RX CMD/DATA Delay 2
48 # Refer to EDS-Vol2-42.3.12.
49 # [17:16] stands for Rx Clock before Output Buffer,
50 # 00: Rx clock after output buffer,
51 # 01: Rx clock before output buffer,
52 # 10: Automatic selection based on working mode.
53 # 11: Reserved
54 # [14:8] steps of delay for Auto Tuning Mode, each 125ps, range: 0 - 39.
55 # [6:0] steps of delay for HS200, each 125ps, range: 0 - 79.
56 register "common_soc_config.emmc_dll.emmc_rx_cmd_data_cntl2" = "0x00010023"
57
58 # EMMC Rx Strobe Delay
59 # Refer to EDS-Vol2-42.3.11.
60 # [14:8] Rx Strobe Delay DLL 1(HS400 Mode), each 125ps, range: 0 - 39.
61 # [6:0] Rx Strobe Delay DLL 2(HS400 Mode), each 125ps, range: 0 - 39.
62 register "common_soc_config.emmc_dll.emmc_rx_strobe_cntl" = "0x00011111"
63
64 # Disable CNVi BT
65 register "cnvi_bt_core" = "false"
66
67 # SOC Aux orientation override:
68 # This is a bitfield that corresponds to up to 4 TCSS ports.
69 # Bits (0,1) allocated for TCSS Port1 configuration and Bits (2,3)for TCSS Port2.
70 # TcssAuxOri = 0101b
71 # Bit0,Bit2 set to "1" indicates no retimer on USBC Ports
72 # Bit1,Bit3 set to "0" indicates Aux lines are not swapped on the
73 # motherboard to USBC connector
74 register "tcss_aux_ori" = "5"
75
76 register "typec_aux_bias_pads[0]" = "{.pad_auxp_dc = GPP_E22, .pad_auxn_dc = GPP_E23}"
77 register "typec_aux_bias_pads[1]" = "{.pad_auxp_dc = GPP_A21, .pad_auxn_dc = GPP_A22}"
78
79 register "usb2_ports[7]" = "USB2_PORT_MID(OC_SKIP)" # Bluetooth port for PCIe WLAN
80
81 # Intel Common SoC Config
82 #+-------------------+---------------------------+
83 #| Field | Value |
84 #+-------------------+---------------------------+
85 #| I2C0 | TPM. Early init is |
86 #| | required to set up a BAR |
87 #| | for TPM communication |
88 #| I2C1 | Touchscreen |
89 #| I2C2 | WCAM |
90 #| I2C3 | Audio |
91 #| I2C5 | Trackpad |
92 #+-------------------+---------------------------+
93 register "common_soc_config" = "{
94 .i2c[0] = {
95 .early_init = 1,
96 .speed = I2C_SPEED_FAST_PLUS,
97 .speed_config[0] = {
98 .speed = I2C_SPEED_FAST_PLUS,
99 .scl_lcnt = 55,
100 .scl_hcnt = 30,
101 .sda_hold = 7,
102 }
103 },
104 .i2c[1] = {
105 .speed = I2C_SPEED_FAST,
106 .speed_config[0] = {
107 .speed = I2C_SPEED_FAST,
108 .scl_lcnt = 158,
109 .scl_hcnt = 79,
110 .sda_hold = 7,
111 }
112 },
113 .i2c[2] = {
114 .speed = I2C_SPEED_FAST,
115 .speed_config[0] = {
116 .speed = I2C_SPEED_FAST,
117 .scl_lcnt = 158,
118 .scl_hcnt = 79,
119 .sda_hold = 7,
120 }
121 },
122 .i2c[3] = {
123 .speed = I2C_SPEED_FAST,
124 .speed_config[0] = {
125 .speed = I2C_SPEED_FAST,
126 .scl_lcnt = 158,
127 .scl_hcnt = 79,
128 .sda_hold = 7,
129 }
130 },
131 .i2c[5] = {
132 .speed = I2C_SPEED_FAST,
133 .speed_config[0] = {
134 .speed = I2C_SPEED_FAST,
135 .scl_lcnt = 158,
136 .scl_hcnt = 79,
137 .sda_hold = 7,
138 }
139 },
140 }"
141
142 device domain 0 on
143 device ref dtt on
144 chip drivers/intel/dptf
145 ## sensor information
146 register "options.tsr[0].desc" = ""Memory""
147 register "options.tsr[1].desc" = ""Ambient""
148 register "options.tsr[2].desc" = ""ChargerMB""
149 register "options.tsr[3].desc" = ""ChargerSUB""
150
151 # TODO: below values are initial reference values only
152 ## Passive Policy
153 register "policies.passive" = "{
154 [0] = DPTF_PASSIVE(CPU, CPU, 90, 5000),
155 [1] = DPTF_PASSIVE(CPU, TEMP_SENSOR_0, 77, 5000),
156 [2] = DPTF_PASSIVE(CPU, TEMP_SENSOR_1, 68, 5000),
157 [3] = DPTF_PASSIVE(CPU, TEMP_SENSOR_2, 78, 5000),
158 [4] = DPTF_PASSIVE(CPU, TEMP_SENSOR_3, 63, 5000),
159 }"
160
161 ## Critical Policy
162 register "policies.critical" = "{
163 [0] = DPTF_CRITICAL(TEMP_SENSOR_0, 87, SHUTDOWN),
164 [1] = DPTF_CRITICAL(TEMP_SENSOR_1, 78, SHUTDOWN),
165 [2] = DPTF_CRITICAL(TEMP_SENSOR_2, 88, SHUTDOWN),
166 [3] = DPTF_CRITICAL(TEMP_SENSOR_3, 73, SHUTDOWN),
167 }"
168
169 register "controls.power_limits" = "{
170 .pl1 = {
171 .min_power = 6000,
172 .max_power = 6000,
173 .time_window_min = 28 * MSECS_PER_SEC,
174 .time_window_max = 32 * MSECS_PER_SEC,
175 .granularity = 200
176 },
177 .pl2 = {
178 .min_power = 25000,
179 .max_power = 25000,
180 .time_window_min = 28 * MSECS_PER_SEC,
181 .time_window_max = 32 * MSECS_PER_SEC,
182 .granularity = 1000
183 }
184 }"
185
186 ## Charger Performance Control (Control, mA)
187 register "controls.charger_perf" = "{
188 [0] = { 255, 1700 },
189 [1] = { 24, 1500 },
190 [2] = { 16, 1000 },
191 [3] = { 8, 500 }
192 }"
193
194 device generic 0 on end
195 end
196 end
197 device ref ipu on
198 chip drivers/intel/mipi_camera
199 register "acpi_uid" = "0x50000"
200 register "acpi_name" = ""IPU0""
201 register "device_type" = "INTEL_ACPI_CAMERA_CIO2"
202
203 register "cio2_num_ports" = "1"
204 register "cio2_lanes_used" = "{4}" # 4 CSI Camera lanes are used
205 register "cio2_lane_endpoint[0]" = ""^I2C2.CAM0""
206 register "cio2_prt[0]" = "2"
207 device generic 0 on end
208 end
209 probe WFC WFC_PRESENT
210 end
211 device ref i2c1 on
212 chip drivers/i2c/hid
213 register "generic.hid" = ""ELAN9008""
214 register "generic.desc" = ""ELAN Touchscreen""
215 register "generic.irq" = "ACPI_IRQ_LEVEL_LOW(GPP_C7_IRQ)"
216 register "generic.detect" = "1"
217 register "generic.reset_gpio" =
218 "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C1)"
219 register "generic.reset_delay_ms" = "300"
220 register "generic.reset_off_delay_ms" = "1"
221 register "generic.enable_gpio" =
222 "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_C0)"
223 register "generic.enable_delay_ms" = "6"
224 register "generic.stop_gpio" =
225 "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C6)"
226 register "generic.stop_off_delay_ms" = "1"
227 register "generic.has_power_resource" = "1"
228 register "hid_desc_reg_offset" = "0x01"
229 device i2c 10 on end
230 end
231 chip drivers/generic/gpio_keys
232 register "name" = ""PENH""
233 register "gpio" = "ACPI_GPIO_INPUT_ACTIVE_LOW(GPP_F13)"
234 register "key.wake_gpe" = "GPE0_DW2_15"
235 register "key.wakeup_route" = "WAKEUP_ROUTE_SCI"
236 register "key.wakeup_event_action" = "EV_ACT_DEASSERTED"
237 register "key.dev_name" = ""EJCT""
238 register "key.linux_code" = "SW_PEN_INSERTED"
239 register "key.linux_input_type" = "EV_SW"
240 register "key.label" = ""pen_eject""
241 device generic 0 on
242 probe STYLUS STYLUS_PRESENT
243 end
244 end
245 end
246 device ref i2c2 on
247 chip drivers/intel/mipi_camera
248 register "acpi_hid" = ""OVTI8856""
249 register "acpi_uid" = "0"
250 register "acpi_name" = ""CAM0""
251 register "chip_name" = ""Ov 8856 Camera""
252 register "device_type" = "INTEL_ACPI_CAMERA_SENSOR"
253
254 register "ssdb.lanes_used" = "4"
255 register "ssdb.link_used" = "1"
256 register "ssdb.vcm_type" = "0x0C"
257 register "vcm_name" = ""VCM0""
258 register "num_freq_entries" = "2"
259 register "link_freq[0]" = "360000000"
260 register "link_freq[1]" = "180000000"
261 register "remote_name" = ""IPU0""
262
263 register "has_power_resource" = "1"
264 #Controls
265 register "clk_panel.clks[0].clknum" = "IMGCLKOUT_3"
266 register "clk_panel.clks[0].freq" = "FREQ_19_2_MHZ"
267
268 register "gpio_panel.gpio[0].gpio_num" = "GPP_D15" # EN_PP2800_WCAM_X
269 register "gpio_panel.gpio[1].gpio_num" = "GPP_D16" # EN_PP1800_PP1200_WCAM_X
270 register "gpio_panel.gpio[2].gpio_num" = "GPP_D3" # WCAM_RST_L
271
272 #_ON
273 register "on_seq.ops_cnt" = "5"
274 register "on_seq.ops[0]" = "SEQ_OPS_CLK_ENABLE(0, 0)"
275 register "on_seq.ops[1]" = "SEQ_OPS_GPIO_ENABLE(0, 5)"
276 register "on_seq.ops[2]" = "SEQ_OPS_GPIO_ENABLE(1, 5)"
277 register "on_seq.ops[3]" = "SEQ_OPS_GPIO_DISABLE(2, 5)"
278 register "on_seq.ops[4]" = "SEQ_OPS_GPIO_ENABLE(2, 5)"
279
280 #_OFF
281 register "off_seq.ops_cnt" = "4"
282 register "off_seq.ops[0]" = "SEQ_OPS_CLK_DISABLE(0, 0)"
283 register "off_seq.ops[1]" = "SEQ_OPS_GPIO_DISABLE(2, 0)"
284 register "off_seq.ops[2]" = "SEQ_OPS_GPIO_DISABLE(1, 0)"
285 register "off_seq.ops[3]" = "SEQ_OPS_GPIO_DISABLE(0, 0)"
286
287 device i2c 36 on
288 probe WFC WFC_PRESENT
289 end
290 end
291 chip drivers/intel/mipi_camera
292 register "acpi_uid" = "3"
293 register "acpi_name" = ""VCM0""
294 register "chip_name" = ""DW AF DAC""
295 register "device_type" = "INTEL_ACPI_CAMERA_VCM"
296
297 register "pr0" = ""\\_SB.PCI0.I2C2.CAM0.PRIC""
298 register "vcm_compat" = ""dongwoon,dw9714""
299
300 device i2c 0C on
301 probe WFC WFC_PRESENT
302 end
303 end
304 chip drivers/intel/mipi_camera
305 register "acpi_hid" = "ACPI_DT_NAMESPACE_HID"
306 register "acpi_uid" = "1"
307 register "acpi_name" = ""NVM0""
308 register "chip_name" = ""GT24C08""
309 register "device_type" = "INTEL_ACPI_CAMERA_NVM"
310
311 register "pr0" = ""\\_SB.PCI0.I2C2.CAM0.PRIC""
312
313 register "nvm_size" = "0x2000"
314 register "nvm_pagesize" = "1"
315 register "nvm_readonly" = "1"
316 register "nvm_width" = "0x10"
317 register "nvm_compat" = ""atmel,24c08""
318
319 device i2c 50 on
320 probe WFC WFC_PRESENT
321 end
322 end
323 end
324 device ref i2c3 on
325 chip drivers/i2c/generic
326 register "hid" = ""RTL5682""
327 register "name" = ""RT58""
328 register "desc" = ""Headset Codec""
329 register "irq_gpio" = "ACPI_GPIO_IRQ_EDGE_BOTH(GPP_A23)"
330 # Set the jd_src to RT5668_JD1 for jack detection
331 register "property_count" = "1"
332 register "property_list[0].type" = "ACPI_DP_TYPE_INTEGER"
333 register "property_list[0].name" = ""realtek,jd-src""
334 register "property_list[0].integer" = "1"
335 device i2c 1a on
336 probe AUDIO_CODEC_SOURCE AUDIO_CODEC_ALC5682_VS
337 end
338 end
339 chip drivers/i2c/generic
340 register "hid" = ""10EC5682""
341 register "name" = ""RT58""
342 register "desc" = ""Headset Codec""
343 register "irq_gpio" = "ACPI_GPIO_IRQ_EDGE_BOTH(GPP_A23)"
344 # Set the jd_src to RT5668_JD1 for jack detection
345 register "property_count" = "1"
346 register "property_list[0].type" = "ACPI_DP_TYPE_INTEGER"
347 register "property_list[0].name" = ""realtek,jd-src""
348 register "property_list[0].integer" = "1"
349 device i2c 1a on
350 probe AUDIO_CODEC_SOURCE AUDIO_CODEC_ALC5682_VD
351 end
352 end
353 chip drivers/generic/alc1015
354 register "hid" = ""RTL1019""
355 register "sdb" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_A11)"
356 device generic 0 on end
357 end
358 end
359 device ref i2c5 on
360 chip drivers/i2c/generic
361 register "hid" = ""ELAN0000""
362 register "desc" = ""ELAN Touchpad""
363 register "irq" = "ACPI_IRQ_WAKE_LEVEL_LOW(GPP_F14_IRQ)"
364 register "wake" = "GPE0_DW2_14"
365 register "detect" = "1"
366 device i2c 15 on end
367 end
368 end
369 device ref pcie_rp4 on
370 # PCIe 4 WLAN
371 register "pch_pcie_rp[PCH_RP(4)]" = "{
372 .clk_src = 2,
373 .clk_req = 2,
374 .flags = PCIE_RP_LTR | PCIE_RP_AER,
375 }"
376 chip drivers/wifi/generic
377 register "wake" = "GPE0_DW1_03"
378 register "add_acpi_dma_property" = "true"
379 device pci 00.0 on end
380 end
381 end
382
383 device ref cnvi_wifi off end
384
385 device ref pch_espi on
386 chip ec/google/chromeec
387 use conn0 as mux_conn[0]
388 use conn1 as mux_conn[1]
389 device pnp 0c09.0 on end
390 end
391 end
392 device ref pmc hidden
393 chip drivers/intel/pmc_mux
394 device generic 0 on
395 chip drivers/intel/pmc_mux/conn
396 use usb2_port1 as usb2_port
397 use tcss_usb3_port1 as usb3_port
398 device generic 0 alias conn0 on end
399 end
400 chip drivers/intel/pmc_mux/conn
401 use usb2_port2 as usb2_port
402 use tcss_usb3_port2 as usb3_port
403 device generic 1 alias conn1 on end
404 end
405 end
406 end
407 end
408 device ref tcss_xhci on
409 chip drivers/usb/acpi
410 device ref tcss_root_hub on
411 chip drivers/usb/acpi
412 register "desc" = ""USB3 Type-C Port C0 (MLB)""
413 register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
414 register "use_custom_pld" = "true"
415 register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, LEFT, ACPI_PLD_GROUP(1, 1))"
416 device ref tcss_usb3_port1 on end
417 end
418 chip drivers/usb/acpi
419 register "desc" = ""USB3 Type-C Port C1 (DB)""
420 register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
421 register "use_custom_pld" = "true"
422 register "custom_pld" = "ACPI_PLD_TYPE_C(RIGHT, RIGHT, ACPI_PLD_GROUP(2, 1))"
423 device ref tcss_usb3_port2 on end
424 end
425 end
426 end
427 end
428 device ref xhci on
429 chip drivers/usb/acpi
430 device ref xhci_root_hub on
431 chip drivers/usb/acpi
432 register "desc" = ""USB2 Type-C Port C0 (MLB)""
433 register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
434 register "use_custom_pld" = "true"
435 register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, LEFT, ACPI_PLD_GROUP(1, 1))"
436 device ref usb2_port1 on end
437 end
438 chip drivers/usb/acpi
439 register "desc" = ""USB2 Type-C Port C1 (DB)""
440 register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
441 register "use_custom_pld" = "true"
442 register "custom_pld" = "ACPI_PLD_TYPE_C(RIGHT, RIGHT, ACPI_PLD_GROUP(2, 1))"
443 device ref usb2_port2 on end
444 end
445 chip drivers/usb/acpi
446 register "desc" = ""USB2 Type-A Port A0 (MLB)""
447 register "type" = "UPC_TYPE_A"
448 register "use_custom_pld" = "true"
449 register "custom_pld" = "ACPI_PLD_TYPE_A(LEFT, RIGHT, ACPI_PLD_GROUP(3, 1))"
450 device ref usb2_port3 on end
451 end
452 chip drivers/usb/acpi
453 register "desc" = ""USB2 Type-A Port A1 (DB)""
454 register "type" = "UPC_TYPE_A"
455 register "use_custom_pld" = "true"
456 register "custom_pld" = "ACPI_PLD_TYPE_A(RIGHT, LEFT, ACPI_PLD_GROUP(4, 1))"
457 device ref usb2_port4 on end
458 end
459 chip drivers/usb/acpi
460 register "desc" = ""USB2 Camera""
461 register "type" = "UPC_TYPE_INTERNAL"
462 device ref usb2_port6 on end
463 end
464 chip drivers/usb/acpi
465 register "desc" = ""USB2 Bluetooth""
466 register "type" = "UPC_TYPE_INTERNAL"
467 register "reset_gpio" =
468 "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_D4)"
469 device ref usb2_port8 on end
470 end
471 chip drivers/usb/acpi
472 register "desc" = ""USB3 Type-A Port A0 (MLB)""
473 register "type" = "UPC_TYPE_USB3_A"
474 register "use_custom_pld" = "true"
475 register "custom_pld" = "ACPI_PLD_TYPE_A(LEFT, RIGHT, ACPI_PLD_GROUP(3, 1))"
476 device ref usb3_port1 on end
477 end
478 chip drivers/usb/acpi
479 register "desc" = ""USB3 Type-A Port A1 (DB)""
480 register "type" = "UPC_TYPE_USB3_A"
481 register "use_custom_pld" = "true"
482 register "custom_pld" = "ACPI_PLD_TYPE_A(RIGHT, LEFT, ACPI_PLD_GROUP(4, 1))"
483 device ref usb3_port2 on end
484 end
485 end
486 end
487 end
488 device ref hda on
489 chip drivers/sof
490 register "spkr_tplg" = "rt1019"
491 register "jack_tplg" = "rt5682"
492 register "mic_tplg" = "_2ch_pdm0"
493 device generic 0 on end
494 end
495 end
496 end
497 end
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