src/soc/intel/braswell/lpss.c

   1 /* SPDX-License-Identifier: GPL-2.0-only */
   2
   3 #include <stdint.h>
   4 #include <acpi/acpi_gnvs.h>
   5 #include <console/console.h>
   6 #include <device/device.h>
   7 #include <device/pci.h>
   8 #include <device/pci_ids.h>
   9 #include <reg_script.h>
  10
  11 #include <soc/iosf.h>
  12 #include <soc/device_nvs.h>
  13 #include <soc/pci_devs.h>
  14 #include <soc/ramstage.h>
  15
  16 #include "chip.h"
  17
  18 static void dev_enable_acpi_mode(struct device *dev, int iosf_reg, int nvs_index)
  19 {
  20         struct reg_script ops[] = {
  21                 /* Disable PCI interrupt, enable Memory and Bus Master */
  22                 REG_PCI_OR16(PCI_COMMAND,
  23                              PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER | PCI_COMMAND_INT_DISABLE),
  24                 /* Enable ACPI mode */
  25                 REG_IOSF_OR(IOSF_PORT_LPSS, iosf_reg,
  26                             LPSS_CTL_PCI_CFG_DIS | LPSS_CTL_ACPI_INT_EN),
  27
  28                 REG_SCRIPT_END
  29         };
  30         struct resource *bar;
  31         struct device_nvs *dev_nvs = acpi_get_device_nvs();
  32
  33         /* Save BAR0 and BAR1 to ACPI NVS */
  34         bar = probe_resource(dev, PCI_BASE_ADDRESS_0);
  35         if (bar)
  36                 dev_nvs->lpss_bar0[nvs_index] = (u32)bar->base;
  37
  38         bar = probe_resource(dev, PCI_BASE_ADDRESS_1);
  39         if (bar)
  40                 dev_nvs->lpss_bar1[nvs_index] = (u32)bar->base;
  41
  42         /* Device is enabled in ACPI mode */
  43         dev_nvs->lpss_en[nvs_index] = 1;
  44
  45         /* Put device in ACPI mode */
  46         reg_script_run_on_dev(dev, ops);
  47 }
  48
  49 #define SET_IOSF_REG(name_) \
  50         case PCI_DEVFN(name_ ## _DEV, name_ ## _FUNC): \
  51                 do { \
  52                         *iosf_reg = LPSS_ ## name_ ## _CTL; \
  53                         *nvs_index = LPSS_NVS_ ## name_; \
  54                 } while (0)
  55
  56 static void dev_ctl_reg(struct device *dev, int *iosf_reg, int *nvs_index)
  57 {
  58         *iosf_reg = -1;
  59         *nvs_index = -1;
  60
  61         switch (dev->path.pci.devfn) {
  62         SET_IOSF_REG(SIO_DMA1);
  63                 break;
  64         SET_IOSF_REG(I2C1);
  65                 break;
  66         SET_IOSF_REG(I2C2);
  67                 break;
  68         SET_IOSF_REG(I2C3);
  69                 break;
  70         SET_IOSF_REG(I2C4);
  71                 break;
  72         SET_IOSF_REG(I2C5);
  73                 break;
  74         SET_IOSF_REG(I2C6);
  75                 break;
  76         SET_IOSF_REG(I2C7);
  77                 break;
  78         SET_IOSF_REG(SIO_DMA2);
  79                 break;
  80         SET_IOSF_REG(PWM1);
  81                 break;
  82         SET_IOSF_REG(PWM2);
  83                 break;
  84         SET_IOSF_REG(HSUART1);
  85                 break;
  86         SET_IOSF_REG(HSUART2);
  87                 break;
  88         SET_IOSF_REG(SPI);
  89                 break;
  90         }
  91 }
  92
  93 #define CASE_I2C(name_) case PCI_DEVFN(name_ ## _DEV, name_ ## _FUNC)
  94
  95 static void i2c_disable_resets(struct device *dev)
  96 {
  97         /* Release the I2C devices from reset. */
  98         static const struct reg_script ops[] = {
  99                 REG_RES_WRITE32(PCI_BASE_ADDRESS_0, 0x804, 0x3),
 100                 REG_SCRIPT_END,
 101         };
 102
 103         switch (dev->path.pci.devfn) {
 104         CASE_I2C(I2C1) :
 105         CASE_I2C(I2C2) :
 106         CASE_I2C(I2C3) :
 107         CASE_I2C(I2C4) :
 108         CASE_I2C(I2C5) :
 109         CASE_I2C(I2C6) :
 110         CASE_I2C(I2C7) :
 111                 printk(BIOS_DEBUG, "Releasing I2C device from reset.\n");
 112                 reg_script_run_on_dev(dev, ops);
 113                 break;
 114         default:
 115                 return;
 116         }
 117 }
 118
 119 static void lpss_init(struct device *dev)
 120 {
 121         struct soc_intel_braswell_config *config = config_of(dev);
 122         int iosf_reg, nvs_index;
 123
 124         dev_ctl_reg(dev, &iosf_reg, &nvs_index);
 125
 126         if (iosf_reg < 0) {
 127                 int slot = PCI_SLOT(dev->path.pci.devfn);
 128                 int func = PCI_FUNC(dev->path.pci.devfn);
 129                 printk(BIOS_DEBUG, "Could not find iosf_reg for %02x.%01x\n", slot, func);
 130                 return;
 131         }
 132
 133         i2c_disable_resets(dev);
 134
 135         if (config->lpss_acpi_mode)
 136                 dev_enable_acpi_mode(dev, iosf_reg, nvs_index);
 137 }
 138
 139 static struct device_operations device_ops = {
 140         .read_resources         = pci_dev_read_resources,
 141         .set_resources          = pci_dev_set_resources,
 142         .enable_resources       = pci_dev_enable_resources,
 143         .init                   = lpss_init,
 144         .ops_pci                = &soc_pci_ops,
 145 };
 146
 147 static const unsigned short pci_device_ids[] = {
 148         SIO_DMA1_DEVID,
 149         I2C1_DEVID,
 150         I2C2_DEVID,
 151         I2C3_DEVID,
 152         I2C4_DEVID,
 153         I2C5_DEVID,
 154         I2C6_DEVID,
 155         I2C7_DEVID,
 156         SIO_DMA2_DEVID,
 157         PWM1_DEVID,
 158         PWM2_DEVID,
 159         HSUART1_DEVID,
 160         HSUART2_DEVID,
 161         SPI_DEVID,
 162         0,
 163 };
 164
 165 static const struct pci_driver southcluster __pci_driver = {
 166         .ops            = &device_ops,
 167         .vendor         = PCI_VID_INTEL,
 168         .devices        = pci_device_ids,
 169 };