src/soc/intel/skylake/Makefile.mk

   1 ## SPDX-License-Identifier: GPL-2.0-only
   2 ifeq ($(CONFIG_SOC_INTEL_COMMON_SKYLAKE_BASE),y)
   3
   4 subdirs-y += nhlt
   5 subdirs-y += romstage
   6 subdirs-y += ../../../cpu/intel/common
   7 subdirs-y += ../../../cpu/intel/microcode
   8 subdirs-y += ../../../cpu/intel/turbo
   9
  10 bootblock-y += bootblock/bootblock.c
  11 bootblock-y += i2c.c
  12 bootblock-y += bootblock/pch.c
  13 bootblock-y += bootblock/report_platform.c
  14 bootblock-y += gpio.c
  15 bootblock-y += gspi.c
  16 bootblock-y += p2sb.c
  17 bootblock-y += pmutil.c
  18 bootblock-y += spi.c
  19 bootblock-y += lpc.c
  20 bootblock-y += uart.c
  21
  22 verstage-y += gpio.c
  23 verstage-y += gspi.c
  24 verstage-y += pmutil.c
  25 verstage-y += i2c.c
  26 verstage-y += spi.c
  27 verstage-y += uart.c
  28
  29 romstage-y += gpio.c
  30 romstage-y += gspi.c
  31 romstage-y += i2c.c
  32 romstage-y += me.c
  33 romstage-y += pmutil.c
  34 romstage-y += reset.c
  35 romstage-y += spi.c
  36 romstage-y += uart.c
  37
  38 ramstage-$(CONFIG_HAVE_ACPI_TABLES) += acpi.c
  39 ramstage-y += chip.c
  40 ramstage-y += cpu.c
  41 ramstage-y += elog.c
  42 ramstage-y += fadt.c
  43 ramstage-y += finalize.c
  44 ramstage-y += gpio.c
  45 ramstage-y += gspi.c
  46 ramstage-y += i2c.c
  47 ramstage-y += graphics.c
  48 ramstage-y += irq.c
  49 ramstage-y += lockdown.c
  50 ramstage-y += lpc.c
  51 ramstage-y += me.c
  52 ramstage-y += p2sb.c
  53 ramstage-y += pmc.c
  54 ramstage-y += pmutil.c
  55 ramstage-y += reset.c
  56 ramstage-y += sd.c
  57 ramstage-y += spi.c
  58 ramstage-y += systemagent.c
  59 ramstage-y += uart.c
  60 ramstage-y += vr_config.c
  61 ramstage-y += xhci.c
  62
  63 smm-y += elog.c
  64 smm-y += gpio.c
  65 smm-y += p2sb.c
  66 smm-y += pmutil.c
  67 smm-y += smihandler.c
  68 smm-y += uart.c
  69 smm-y += xhci.c
  70
  71 postcar-y += gspi.c
  72 postcar-y += spi.c
  73 postcar-y += i2c.c
  74 postcar-y += uart.c
  75
  76 ifeq ($(CONFIG_SKYLAKE_SOC_PCH_H),y)
  77 ifeq ($(CONFIG_MAINBOARD_SUPPORTS_SKYLAKE_CPU),y)
  78 # Skylake H Q0
  79 cpu_microcode_bins += 3rdparty/intel-microcode/intel-ucode/06-5e-03
  80 endif
  81 ifeq ($(CONFIG_MAINBOARD_SUPPORTS_KABYLAKE_CPU),y)
  82 # Kabylake H B0 S0
  83 cpu_microcode_bins += 3rdparty/intel-microcode/intel-ucode/06-9e-09
  84 endif
  85 # CoffeeLake
  86 ifeq ($(CONFIG_MAINBOARD_SUPPORTS_COFFEELAKE_CPU),y)
  87 cpu_microcode_bins += 3rdparty/intel-microcode/intel-ucode/06-9e-0a
  88 cpu_microcode_bins += 3rdparty/intel-microcode/intel-ucode/06-9e-0b
  89 cpu_microcode_bins += 3rdparty/intel-microcode/intel-ucode/06-9e-0c
  90 cpu_microcode_bins += 3rdparty/intel-microcode/intel-ucode/06-9e-0d
  91 endif
  92 else
  93 ifeq ($(CONFIG_MAINBOARD_SUPPORTS_SKYLAKE_CPU),y)
  94 # Skylake D0
  95 cpu_microcode_bins += 3rdparty/intel-microcode/intel-ucode/06-4e-03
  96 endif
  97 ifeq ($(CONFIG_MAINBOARD_SUPPORTS_KABYLAKE_DUAL),y)
  98 # Kabylake H0, J0, J1
  99 cpu_microcode_bins += 3rdparty/intel-microcode/intel-ucode/06-8e-09
 100 endif
 101 ifeq ($(CONFIG_MAINBOARD_SUPPORTS_KABYLAKE_QUAD),y)
 102 # Kabylake Y0
 103 cpu_microcode_bins += 3rdparty/intel-microcode/intel-ucode/06-8e-0a
 104 endif
 105 endif
 106 # Missing for Skylake C0 (0x406e2), Kabylake G0 (0x406e8), Kabylake HA0 (0x506e8)
 107 # since those are probably pre-release samples.
 108
 109 CPPFLAGS_common += -I$(src)/soc/intel/skylake
 110 CPPFLAGS_common += -I$(src)/soc/intel/skylake/include
 111
 112 endif