src/soc/intel/skylake/lpc.c

   1 /* SPDX-License-Identifier: GPL-2.0-only */
   2
   3 #include <device/device.h>
   4 #include <device/pci.h>
   5 #include <pc80/isa-dma.h>
   6 #include <pc80/i8259.h>
   7 #include <arch/ioapic.h>
   8 #include <intelblocks/itss.h>
   9 #include <intelblocks/lpc_lib.h>
  10 #include <soc/iomap.h>
  11 #include <soc/pcr_ids.h>
  12 #include <soc/intel/common/block/lpc/lpc_def.h>
  13 #include <static.h>
  14
  15 #include "chip.h"
  16
  17 void soc_get_gen_io_dec_range(uint32_t gen_io_dec[LPC_NUM_GENERIC_IO_RANGES])
  18 {
  19         const config_t *config = config_of_soc();
  20
  21         gen_io_dec[0] = config->gen1_dec;
  22         gen_io_dec[1] = config->gen2_dec;
  23         gen_io_dec[2] = config->gen3_dec;
  24         gen_io_dec[3] = config->gen4_dec;
  25 }
  26
  27 void lpc_soc_init(struct device *dev)
  28 {
  29         const config_t *const config = config_of(dev);
  30
  31         /* Legacy initialization */
  32         isa_dma_init();
  33         pch_misc_init();
  34
  35         /* Enable BIOS updates outside of SMM */
  36         pci_and_config8(PCH_DEV_LPC, 0xdc, ~(1 << 5));
  37
  38         /* Enable CLKRUN_EN for power gating LPC */
  39         lpc_enable_pci_clk_cntl();
  40
  41         /* Set LPC Serial IRQ mode */
  42         lpc_set_serirq_mode(config->serirq_mode);
  43
  44         /* Interrupt configuration */
  45         pch_enable_ioapic();
  46         pch_pirq_init();
  47         setup_i8259();
  48         i8259_configure_irq_trigger(9, 1);
  49 }