src/soc/intel/tigerlake/espi.c

   1 /* SPDX-License-Identifier: GPL-2.0-only */
   2
   3 /*
   4  * This file is created based on Intel Tiger Lake Processor PCH Datasheet
   5  * Document number: 575857
   6  * Chapter number: 2
   7  */
   8
   9 #include <device/device.h>
  10 #include <device/pci.h>
  11 #include <pc80/isa-dma.h>
  12 #include <pc80/i8259.h>
  13 #include <device/pci_ops.h>
  14 #include <arch/ioapic.h>
  15 #include <intelblocks/itss.h>
  16 #include <intelblocks/lpc_lib.h>
  17 #include <intelpch/espi.h>
  18 #include <soc/iomap.h>
  19 #include <soc/irq.h>
  20 #include <soc/pci_devs.h>
  21 #include <soc/pcr_ids.h>
  22 #include <soc/soc_chip.h>
  23 #include <static.h>
  24
  25 void soc_get_gen_io_dec_range(uint32_t gen_io_dec[LPC_NUM_GENERIC_IO_RANGES])
  26 {
  27         const config_t *config = config_of_soc();
  28
  29         gen_io_dec[0] = config->gen1_dec;
  30         gen_io_dec[1] = config->gen2_dec;
  31         gen_io_dec[2] = config->gen3_dec;
  32         gen_io_dec[3] = config->gen4_dec;
  33 }
  34
  35 #if ENV_RAMSTAGE
  36 void lpc_soc_init(struct device *dev)
  37 {
  38         /* Legacy initialization */
  39         isa_dma_init();
  40         pch_misc_init();
  41
  42         /* Enable CLKRUN_EN for power gating ESPI */
  43         lpc_enable_pci_clk_cntl();
  44
  45         /* Set ESPI Serial IRQ mode */
  46         if (CONFIG(SERIRQ_CONTINUOUS_MODE))
  47                 lpc_set_serirq_mode(SERIRQ_CONTINUOUS);
  48         else
  49                 lpc_set_serirq_mode(SERIRQ_QUIET);
  50
  51         /* Interrupt configuration */
  52         pch_enable_ioapic();
  53         pch_pirq_init();
  54         setup_i8259();
  55         i8259_configure_irq_trigger(9, 1);
  56 }
  57
  58 #endif