src/soc/intel/tigerlake/p2sb.c

   1 /* SPDX-License-Identifier: GPL-2.0-only */
   2
   3 /*
   4  * This file is created based on Intel Tiger Lake Processor PCH Datasheet
   5  * Document number: 575857
   6  * Chapter number: 3
   7  */
   8
   9 #include <console/console.h>
  10 #include <intelblocks/p2sb.h>
  11 #include <types.h>
  12
  13 void p2sb_soc_get_sb_mask(uint32_t *ep_mask, size_t count)
  14 {
  15         uint32_t mask;
  16
  17         if (count != P2SB_EP_MASK_MAX_REG) {
  18                 printk(BIOS_ERR, "Unable to program EPMASK registers\n");
  19                 return;
  20         }
  21
  22         /* Remove the host accessing right to PSF register range.
  23          * Set p2sb PCI offset EPMASK5 [29, 28, 27, 26] to disable Sideband
  24          * access for PCI Root Bridge.
  25          */
  26         mask = (1 << 29) | (1 << 28) | (1 << 27)  | (1 << 26);
  27
  28         ep_mask[P2SB_EP_MASK_5_REG] = mask;
  29
  30         /*
  31          * Set p2sb PCI offset EPMASK7 [31, 30] to disable Sideband
  32          * access for Broadcast and Multicast.
  33          */
  34         mask = (1 << 31) | (1 << 30);
  35
  36         ep_mask[P2SB_EP_MASK_7_REG] = mask;
  37 }