src/soc/intel/xeon_sp/lpc_gen6.c

   1 /* SPDX-License-Identifier: GPL-2.0-or-later */
   2
   3 #include <console/console.h>
   4 #include <intelblocks/itss.h>
   5 #include <intelblocks/lpc_lib.h>
   6 #include <intelblocks/pcr.h>
   7 #include <soc/pcr_ids.h>
   8
   9 #include <acpi/acpigen.h>
  10 #include <acpi/acpigen_pci.h>
  11
  12 void lpc_soc_fill_ssdt(const struct device *dev)
  13 {
  14         const char *scope = acpi_device_scope(dev);
  15         const char *name = acpi_device_name(dev);
  16
  17         if (!scope || !name) {
  18                 printk(BIOS_ERR, "%s: Missing ACPI path/scope\n", dev_path(dev));
  19                 return;
  20         }
  21
  22         /* Device */
  23         acpigen_write_scope(scope);
  24         acpigen_write_device(name);
  25
  26         printk(BIOS_DEBUG, "%s.%s: %s\n", scope, name, dev_path(dev));
  27         acpigen_write_ADR_pci_device(dev);
  28
  29         acpigen_write_device_end(); /* Device */
  30         acpigen_write_scope_end(); /* Scope */
  31 }
  32
  33 void lpc_soc_init(struct device *dev)
  34 {
  35         printk(BIOS_SPEW, "pch: lpc_init\n");
  36
  37         /* Program irq pin/line for PCI devices by PCH convention */
  38         pch_pirq_init();
  39
  40         /* Explicitly set polarity low for PIRQA to PIRQH */
  41         for (int i = 0; i < PIRQ_COUNT; i++) {
  42                 itss_set_irq_polarity(pcr_read8(PID_ITSS, PCR_ITSS_PIRQA_ROUT + i), 1);
  43         }
  44 }