mb/google/brya/var/orisa: Update Type C DisplayPort HPD Configuration
[coreboot2.git] / src / soc / nvidia / tegra124 / Makefile.mk
blobfb8c160faeba2a237f22b6df0bea8e602546e227
1 ## SPDX-License-Identifier: GPL-2.0-only
2 ifeq ($(CONFIG_SOC_NVIDIA_TEGRA124),y)
4 bootblock-y += bootblock.c
5 bootblock-y += bootblock_asm.S
6 bootblock-y += clock.c
7 bootblock-y += dma.c
8 bootblock-y += i2c.c
9 bootblock-y += dma.c
10 bootblock-y += maincpu.S
11 bootblock-y += monotonic_timer.c
12 bootblock-y += power.c
13 bootblock-y += spi.c
14 bootblock-y += ../tegra/gpio.c
15 bootblock-y += ../tegra/i2c.c
16 bootblock-$(CONFIG_SOFTWARE_I2C) += ../tegra/software_i2c.c
17 bootblock-y += ../tegra/pingroup.c
18 bootblock-y += ../tegra/pinmux.c
19 bootblock-y += ../tegra/apbmisc.c
20 bootblock-y += uart.c
22 verstage-y += verstage.c
23 verstage-y += dma.c
24 verstage-y += monotonic_timer.c
25 verstage-y += spi.c
26 verstage-y += uart.c
27 verstage-y += ../tegra/gpio.c
28 verstage-y += ../tegra/i2c.c
29 verstage-y += ../tegra/pinmux.c
30 verstage-y += clock.c
31 verstage-y += i2c.c
32 verstage-y += cache.c
34 romstage-y += cbmem.c
35 romstage-y += clock.c
36 romstage-y += dma.c
37 romstage-y += i2c.c
38 romstage-y += monotonic_timer.c
39 romstage-y += power.c
40 romstage-y += sdram.c
41 romstage-y += sdram_lp0.c
42 romstage-y += spi.c
43 romstage-y += ../tegra/gpio.c
44 romstage-y += ../tegra/i2c.c
45 romstage-$(CONFIG_SOFTWARE_I2C) += ../tegra/software_i2c.c
46 romstage-y += ../tegra/pinmux.c
47 romstage-y += cache.c
48 romstage-y += uart.c
50 ramstage-y += clock.c
51 ramstage-y += display.c
52 ramstage-y += dma.c
53 ramstage-y += i2c.c
54 ramstage-y += maincpu.S
55 ramstage-y += monotonic_timer.c
56 ramstage-y += sdram.c
57 ramstage-y += soc.c
58 ramstage-y += sor.c
59 ramstage-y += spi.c
60 ramstage-y += dp.c
61 ramstage-y += ../tegra/gpio.c
62 ramstage-y += ../tegra/i2c.c
63 ramstage-$(CONFIG_SOFTWARE_I2C) += ../tegra/software_i2c.c
64 ramstage-y += ../tegra/pinmux.c
65 ramstage-y += ../tegra/usb.c
66 ramstage-y += uart.c
68 rmodules_$(ARCH-romstage-y)-y += monotonic_timer.c
70 CPPFLAGS_common += -Isrc/soc/nvidia/tegra124/include/
72 # We want to grab the bootblock right before it goes into the image and wrap
73 # it inside a BCT, but ideally we would do that without making special, one
74 # use modifications to the main ARM Makefile. We do this in two ways. First,
75 # we copy bootblock.elf to bootblock.raw.elf and allow the %.bin: %.elf
76 # template rule to turn it into bootblock.raw.bin. This makes sure whatever
77 # processing is supposed to happen to turn an .elf into a .bin happens.
79 # Second, we add our own rule for creating bootblock.bin from
80 # bootblock.raw.bin which displaces the template rule. When other rules that
81 # package up the image pull in bootblock.bin, it will be this wrapped version
82 # instead of the raw bootblock.
84 $(obj)/generated/bct.bin: $(obj)/generated/bct.cfg $(CBOOTIMAGE)
85 @printf " CBOOTIMAGE $(subst $(obj)/,,$(@))\n"
86 $(CBOOTIMAGE) -gbct --soc tegra124 $< $@
88 BCT_BIN = $(obj)/generated/bct.bin
89 BCT_WRAPPER = $(obj)/generated/bct.wrapper
90 $(objcbfs)/bootblock.bin: $(objcbfs)/bootblock.raw.bin $(BCT_BIN) $(CBOOTIMAGE)
91 echo "Version = 1;" > $(BCT_WRAPPER)
92 echo "Redundancy = 1;" >> $(BCT_WRAPPER)
93 echo "Bctfile = $(BCT_BIN);" >> $(BCT_WRAPPER)
94 echo "BootLoader = $<,$(call loadaddr,bootblock),$(call loadaddr,bootblock),Complete;" >> $(BCT_WRAPPER)
95 @printf " CBOOTIMAGE $(subst $(obj)/,,$(@))\n"
96 $(CBOOTIMAGE) $(BCT_WRAPPER) $@
98 endif