mb/google/brya/var/orisa: Update Type C DisplayPort HPD Configuration
[coreboot2.git] / src / soc / qualcomm / sc7280 / cpucp_load_reset.c
blob6f8f51ff9fe98cdbe09da8388b27945467d6b4e5
1 /* SPDX-License-Identifier: GPL-2.0-only */
3 #include <assert.h>
4 #include <console/console.h>
5 #include <program_loading.h>
6 #include <soc/mmu.h>
7 #include <soc/cpucp.h>
8 #include <soc/clock.h>
9 #include <device/mmio.h>
10 #include <timer.h>
12 void cpucp_prepare(void)
14 /* allow NS access to EPSS memory */
15 setbits32(&epss_top->access_override, 0x1);
17 /* Enable subsystem clock. Required for CPUCP PDMEM access */
18 setbits32(&epss_fast->epss_muc_clk_ctrl, 0x1);
21 void cpucp_fw_load_reset(void)
23 struct prog cpucp_fw_prog =
24 PROG_INIT(PROG_PAYLOAD, CONFIG_CBFS_PREFIX "/cpucp");
26 if (!wait_ms(300, (read32(&epss_fast->epss_muc_clk_ctrl) & 0x1) == 0x1))
27 printk(BIOS_ERR, "%s: cannot get CPUCP PDMEM access.\n", __func__);
29 if (!selfload(&cpucp_fw_prog))
30 die("SOC image: CPUCP load failed");
32 printk(BIOS_DEBUG, "SOC:CPUCP image loaded successfully.\n");