| blob | 05b7d58c503340d6966776a27113da5d6a8ed0f1 |
1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 OperationRegion (TMEM, PCI_Config, 0x00, 0x0100)
4 Field (TMEM, ByteAcc, NoLock, Preserve)
5 {
6 Offset (0x40),
7 , 4,
8 BSEG, 4,
9 PAMS, 48,
10 Offset (0x52),
11 DIM0, 4,
12 DIM1, 4,
13 Offset (0x54),
14 DIM2, 4
15 }
17 Name (MTBL, Package (0x10)
18 {
19 0x00,
20 0x20,
21 0x20,
22 0x30,
23 0x40,
24 0x40,
25 0x60,
26 0x80,
27 0x80,
28 0x80,
29 0x80,
30 0xC0,
31 0x0100,
32 0x0100,
33 0x0100,
34 0x0200
35 })
36 Name (ERNG, Package (0x0D)
37 {
38 0x000C0000,
39 0x000C4000,
40 0x000C8000,
41 0x000CC000,
42 0x000D0000,
43 0x000D4000,
44 0x000D8000,
45 0x000DC000,
46 0x000E0000,
47 0x000E4000,
48 0x000E8000,
49 0x000EC000,
50 0x000F0000
51 })
52 Name (PAMB, Buffer (0x07){})
54 Device (APIC)
55 {
56 Name (_HID, EisaId ("PNP0003") /* IO-APIC Interrupt Controller */)
57 Name (_CRS, ResourceTemplate ()
58 {
59 Memory32Fixed (ReadOnly, 0xFEC00000, 0x00100000)
60 })
61 }
63 Device (LPCB)
64 {
65 Name (_ADR, 0x001F0000)
66 Name (_DDN, "LPC Bus Device")
68 Device (DMAC)
69 {
70 Name (_HID, EisaId ("PNP0200") /* PC-class DMA Controller */)
71 Name (_CRS, ResourceTemplate ()
72 {
73 IO (Decode16,
74 0x0000, // Range Minimum
75 0x0000, // Range Maximum
76 0x00, // Alignment
77 0x10, // Length
78 )
79 IO (Decode16,
80 0x0081, // Range Minimum
81 0x0081, // Range Maximum
82 0x00, // Alignment
83 0x03, // Length
84 )
85 IO (Decode16,
86 0x0087, // Range Minimum
87 0x0087, // Range Maximum
88 0x00, // Alignment
89 0x01, // Length
90 )
91 IO (Decode16,
92 0x0089, // Range Minimum
93 0x0089, // Range Maximum
94 0x00, // Alignment
95 0x03, // Length
96 )
97 IO (Decode16,
98 0x008F, // Range Minimum
99 0x008F, // Range Maximum
100 0x00, // Alignment
101 0x01, // Length
102 )
103 IO (Decode16,
104 0x00C0, // Range Minimum
105 0x00C0, // Range Maximum
106 0x00, // Alignment
107 0x20, // Length
108 )
109 DMA (Compatibility, NotBusMaster, Transfer8, )
110 {4}
111 })
112 }
114 Device (RTC)
115 {
116 Name (_HID, EisaId ("PNP0B00") /* AT Real-Time Clock */)
117 Name (_CRS, ResourceTemplate ()
118 {
119 IO (Decode16,
120 0x0070, // Range Minimum
121 0x0070, // Range Maximum
122 0x01, // Alignment
123 0x02, // Length
124 )
125 IO (Decode16,
126 0x0072, // Range Minimum
127 0x0072, // Range Maximum
128 0x01, // Alignment
129 0x02, // Length
130 )
131 IO (Decode16,
132 0x0074, // Range Minimum
133 0x0074, // Range Maximum
134 0x01, // Alignment
135 0x04, // Length
136 )
137 IRQNoFlags ()
138 {8}
139 })
140 }
142 Device (PIC)
143 {
144 Name (_HID, EisaId ("PNP0000") /* 8259-compatible Programmable Interrupt Controller */)
145 Name (_CRS, ResourceTemplate ()
146 {
147 IO (Decode16,
148 0x0020, // Range Minimum
149 0x0020, // Range Maximum
150 0x01, // Alignment
151 0x1E, // Length
152 )
153 IO (Decode16,
154 0x00A0, // Range Minimum
155 0x00A0, // Range Maximum
156 0x01, // Alignment
157 0x1E, // Length
158 )
159 IO (Decode16,
160 0x04D0, // Range Minimum
161 0x04D0, // Range Maximum
162 0x01, // Alignment
163 0x02, // Length
164 )
165 })
166 }
168 Device (FPU)
169 {
170 Name (_HID, EisaId ("PNP0C04") /* x87-compatible Floating Point Processing Unit */)
171 Name (_CRS, ResourceTemplate ()
172 {
173 IO (Decode16,
174 0x00F0, // Range Minimum
175 0x00F0, // Range Maximum
176 0x01, // Alignment
177 0x01, // Length
178 )
179 IRQNoFlags ()
180 {13}
181 })
182 }
184 Device (TMR)
185 {
186 Name (_HID, EisaId ("PNP0100"))
187 Name (_CRS, ResourceTemplate ()
188 {
189 IO (Decode16,
190 0x0040, // Range Minimum
191 0x0040, // Range Maximum
192 0x01, // Alignment
193 0x04, // Length
194 )
195 IO (Decode16,
196 0x0050, // Range Minimum
197 0x0050, // Range Maximum
198 0x01, // Alignment
199 0x04, // Length
200 )
201 IRQNoFlags ()
202 {0}
203 })
204 }
206 Device (SPKR)
207 {
208 Name (_HID, EisaId ("PNP0800"))
209 Name (_CRS, ResourceTemplate ()
210 {
211 IO (Decode16,
212 0x0061, // Range Minimum
213 0x0061, // Range Maximum
214 0x01, // Alignment
215 0x01, // Length
216 )
217 })
218 }
220 Device (XTRA)
221 {
222 Name (_HID, EisaId ("PNP0C02"))
223 Name (_CRS, ResourceTemplate ()
224 {
225 IO (Decode16,
226 0x0500, // Range Minimum
227 0x0500, // Range Maximum
228 0x01, // Alignment
229 0xFF, // Length
230 )
231 IO (Decode16,
232 0x0400, // Range Minimum
233 0x0400, // Range Maximum
234 0x01, // Alignment
235 0x20, // Length
236 )
237 IO (Decode16,
238 0x0010, // Range Minimum
239 0x0010, // Range Maximum
240 0x01, // Alignment
241 0x10, // Length
242 )
243 IO (Decode16,
244 0x0080, // Range Minimum
245 0x0080, // Range Maximum
246 0x01, // Alignment
247 0x01, // Length
248 )
249 IO (Decode16,
250 0x0084, // Range Minimum
251 0x0084, // Range Maximum
252 0x01, // Alignment
253 0x03, // Length
254 )
255 IO (Decode16,
256 0x0088, // Range Minimum
257 0x0088, // Range Maximum
258 0x01, // Alignment
259 0x01, // Length
260 )
261 IO (Decode16,
262 0x008C, // Range Minimum
263 0x008C, // Range Maximum
264 0x01, // Alignment
265 0x03, // Length
266 )
267 IO (Decode16,
268 0x0090, // Range Minimum
269 0x0090, // Range Maximum
270 0x01, // Alignment
271 0x10, // Length
272 )
273 IO (Decode16,
274 0x0600, // Range Minimum
275 0x0600, // Range Maximum
276 0x01, // Alignment
277 0x20, // Length
278 )
279 IO (Decode16,
280 0x0CA0, // Range Minimum
281 0x0CA0, // Range Maximum
282 0x01, // Alignment
283 0x02, // Length
284 )
285 IO (Decode16,
286 0x0CA4, // Range Minimum
287 0x0CA4, // Range Maximum
288 0x01, // Alignment
289 0x03, // Length
290 )
291 Memory32Fixed (ReadOnly,
292 0xFF000000, // Address Base
293 0x01000000, // Address Length
294 )
295 })
296 }
298 Device (HPET)
299 {
300 Name (_HID, EisaId ("PNP0103") /* HPET System Timer */)
301 Method (_STA, 0, NotSerialized) // _STA: Status
302 {
303 Return (0x0F)
304 }
306 Name (CRS0, ResourceTemplate ()
307 {
308 Memory32Fixed (ReadWrite,
309 0xFED00000, // Address Base
310 0x00000400, // Address Length
311 )
312 })
313 Name (CRS1, ResourceTemplate ()
314 {
315 Memory32Fixed (ReadWrite,
316 0xFED01000, // Address Base
317 0x00000400, // Address Length
318 )
319 })
320 Name (CRS2, ResourceTemplate ()
321 {
322 Memory32Fixed (ReadWrite,
323 0xFED02000, // Address Base
324 0x00000400, // Address Length
325 )
326 })
327 Name (CRS3, ResourceTemplate ()
328 {
329 Memory32Fixed (ReadWrite,
330 0xFED03000, // Address Base
331 0x00000400, // Address Length
332 )
333 })
334 Method (_CRS, 0, Serialized)
335 {
336 Return (CRS0) /* \_SB_.PC00.HPET.CRS0 */
337 }
338 }
339 }
341 Device (HDAS)
342 {
343 Name (_ADR, 0x001F0003)
344 OperationRegion (HDAR, PCI_Config, 0x00, 0x0100)
345 Field (HDAR, WordAcc, NoLock, Preserve)
346 {
347 VDID, 32
348 }
350 Name (_S0W, 0x03) // _S0W: S0 Device Wake State
351 Method (_DSW, 3, NotSerialized) // _DSW: Device Sleep Wake
352 {
353 }
354 }
356 Scope (\_GPE)
357 {
358 OperationRegion (PMIO, SystemIO, ACPI_BASE_ADDRESS, 0xFF)
359 Field (PMIO, ByteAcc, NoLock, Preserve) {
360 Offset(0x34), /* 0x34, SMI/SCI STS*/
361 , 9,
362 SGCS, 1, /* SWGPE STS BIT */
364 Offset(0x40), /* 0x40, SMI/SCI_EN*/
365 , 17,
366 SGPC, 1, /* SWGPE CTRL BIT */
368 Offset(0x6C), /* 0x6C, General Purpose Event 0 Status [127:96] */
369 , 2,
370 SGPS, 1, /* SWGPE STATUS */
372 Offset(0x7C), /* 0x7C, General Purpose Event 0 Enable [127:96] */
373 , 2,
374 SGPE, 1 /* SWGPE ENABLE */
375 }
376 Device (RAS)
377 {
378 Name (_HID, EisaId ("PNP0C33"))
379 Name (_UID, 0)
380 Name (_DDN, "RAS Error Device Controller")
381 Printf ("Initialized RAS Device PNP0C33")
382 }
383 Method(_L62, 0) {
384 Printf ("SWGPE Method _L62")
385 SGPC = 0 // clear SWGPE enable
386 SGPS = 1 // clear SWGPE Status
387 Notify(RAS, 0x80)
388 }
390 }
392 #include "pch_rp.asl"