src/lib/espi_debug.c

   1 /* SPDX-License-Identifier: GPL-2.0-only */
   2
   3 #include <console/console.h>
   4 #include <espi.h>
   5 #include <stdint.h>
   6
   7 void espi_show_slave_general_configuration(uint32_t config)
   8 {
   9         uint32_t io_mode;
  10         uint32_t op_freq;
  11
  12         printk(BIOS_DEBUG, "eSPI Slave configuration:\n");
  13
  14         if (config & ESPI_SLAVE_CRC_ENABLE)
  15                 printk(BIOS_DEBUG, "    CRC checking enabled\n");
  16
  17         if (config & ESPI_SLAVE_RESP_MOD_ENABLE)
  18                 printk(BIOS_DEBUG, "    Response modifier enabled\n");
  19
  20         if (config & ESPI_SLAVE_ALERT_MODE_PIN)
  21                 printk(BIOS_DEBUG, "    Dedicated Alert# used to signal alert event\n");
  22         else
  23                 printk(BIOS_DEBUG, "    IO bit1 pin used to signal alert event\n");
  24
  25         io_mode = config & ESPI_SLAVE_IO_MODE_SEL_MASK;
  26         switch (io_mode) {
  27         case ESPI_SLAVE_IO_MODE_SEL_SINGLE:
  28                 printk(BIOS_DEBUG, "    eSPI single IO mode selected\n");
  29                 break;
  30         case ESPI_SLAVE_IO_MODE_SEL_DUAL:
  31                 printk(BIOS_DEBUG, "    eSPI dual IO mode selected\n");
  32                 break;
  33         case ESPI_SLAVE_IO_MODE_SEL_QUAD:
  34                 printk(BIOS_DEBUG, "    eSPI quad IO mode selected\n");
  35                 break;
  36         default:
  37                 printk(BIOS_DEBUG, "    Error: Invalid eSPI IO mode selected\n");
  38         }
  39
  40         io_mode = config & ESPI_SLAVE_IO_MODE_SUPP_MASK;
  41         switch (io_mode) {
  42         case ESPI_SLAVE_IO_MODE_SUPP_SINGLE_QUAD:
  43                 printk(BIOS_DEBUG, "    eSPI quad and single IO modes supported\n");
  44                 break;
  45         case ESPI_SLAVE_IO_MODE_SUPP_SINGLE_DUAL:
  46                 printk(BIOS_DEBUG, "    eSPI dual and single IO modes supported\n");
  47                 break;
  48         case ESPI_SLAVE_IO_MODE_SUPP_SINGLE_DUAL_QUAD:
  49                 printk(BIOS_DEBUG, "    eSPI quad, dual and single IO modes supported\n");
  50                 break;
  51         default:
  52                 printk(BIOS_DEBUG, "    Only eSPI single IO mode supported\n");
  53         }
  54
  55         if (config & ESPI_SLAVE_OPEN_DRAIN_ALERT_SEL)
  56                 printk(BIOS_DEBUG, "    Alert# pin is open-drain\n");
  57         else
  58                 printk(BIOS_DEBUG, "    Alert# pin is driven\n");
  59
  60         op_freq = config & ESPI_SLAVE_OP_FREQ_SEL_MASK;
  61         switch (op_freq) {
  62         case ESPI_SLAVE_OP_FREQ_SEL_20_MHZ:
  63                 printk(BIOS_DEBUG, "    eSPI 20MHz selected\n");
  64                 break;
  65         case ESPI_SLAVE_OP_FREQ_SEL_25_MHZ:
  66                 printk(BIOS_DEBUG, "    eSPI 25MHz selected\n");
  67                 break;
  68         case ESPI_SLAVE_OP_FREQ_SEL_33_MHZ:
  69                 printk(BIOS_DEBUG, "    eSPI 33MHz selected\n");
  70                 break;
  71         case ESPI_SLAVE_OP_FREQ_SEL_50_MHZ:
  72                 printk(BIOS_DEBUG, "    eSPI 50MHz selected\n");
  73                 break;
  74         case ESPI_SLAVE_OP_FREQ_SEL_66_MHZ:
  75                 printk(BIOS_DEBUG, "    eSPI 66MHz selected\n");
  76                 break;
  77         default:
  78                 printk(BIOS_DEBUG, "    Error: Invalid eSPI frequency\n");
  79         }
  80
  81         if (config & ESPI_SLAVE_OPEN_DRAIN_ALERT_SUPP)
  82                 printk(BIOS_DEBUG, "    Open-drain Alert# pin supported\n");
  83
  84         op_freq = config & ESPI_SLAVE_OP_FREQ_SUPP_MASK;
  85         switch (op_freq) {
  86         case ESPI_SLAVE_OP_FREQ_SUPP_20_MHZ:
  87                 printk(BIOS_DEBUG, "    eSPI up to 20MHz supported\n");
  88                 break;
  89         case ESPI_SLAVE_OP_FREQ_SUPP_25_MHZ:
  90                 printk(BIOS_DEBUG, "    eSPI up to 25MHz supported\n");
  91                 break;
  92         case ESPI_SLAVE_OP_FREQ_SUPP_33_MHZ:
  93                 printk(BIOS_DEBUG, "    eSPI up to 33MHz supported\n");
  94                 break;
  95         case ESPI_SLAVE_OP_FREQ_SUPP_50_MHZ:
  96                 printk(BIOS_DEBUG, "    eSPI up to 50MHz supported\n");
  97                 break;
  98         case ESPI_SLAVE_OP_FREQ_SUPP_66_MHZ:
  99                 printk(BIOS_DEBUG, "    eSPI up to 66MHz supported\n");
 100                 break;
 101         default:
 102                 printk(BIOS_DEBUG, "    Error: Invalid eSPI frequency\n");
 103         }
 104
 105         printk(BIOS_DEBUG, "    Maximum Wait state: %d\n",
 106                (config & ESPI_SLAVE_MAX_WAIT_MASK) >> ESPI_SLAVE_MAX_WAIT_SHIFT);
 107
 108         if (config & ESPI_SLAVE_PERIPH_CH_SUPP)
 109                 printk(BIOS_DEBUG, "    Peripheral Channel supported\n");
 110         if (config & ESPI_SLAVE_VW_CH_SUPP)
 111                 printk(BIOS_DEBUG, "    Virtual Wire Channel supported\n");
 112         if (config & ESPI_SLAVE_OOB_CH_SUPP)
 113                 printk(BIOS_DEBUG, "    OOB Channel supported\n");
 114         if (config & ESPI_SLAVE_FLASH_CH_SUPP)
 115                 printk(BIOS_DEBUG, "    Flash Access Channel supported\n");
 116         printk(BIOS_DEBUG, "\n");
 117 }
 118
 119 void espi_show_slave_peripheral_channel_configuration(uint32_t config)
 120 {
 121         uint32_t request_size;
 122         uint32_t payload_size;
 123
 124         printk(BIOS_DEBUG, "eSPI Slave Peripheral configuration:\n");
 125
 126         printk(BIOS_DEBUG, "    Peripheral Channel Maximum Read Request Size: ");
 127         request_size = config & ESPI_SLAVE_PERIPH_MAX_READ_SIZE_MASK;
 128         switch (request_size) {
 129         case ESPI_SLAVE_PERIPH_MAX_READ_64B:
 130                 printk(BIOS_DEBUG, "64 bytes\n");
 131                 break;
 132         case ESPI_SLAVE_PERIPH_MAX_READ_128B:
 133                 printk(BIOS_DEBUG, "128 bytes\n");
 134                 break;
 135         case ESPI_SLAVE_PERIPH_MAX_READ_256B:
 136                 printk(BIOS_DEBUG, "256 bytes\n");
 137                 break;
 138         case ESPI_SLAVE_PERIPH_MAX_READ_512B:
 139                 printk(BIOS_DEBUG, "512 bytes\n");
 140                 break;
 141         case ESPI_SLAVE_PERIPH_MAX_READ_1024B:
 142                 printk(BIOS_DEBUG, "1024 bytes\n");
 143                 break;
 144         case ESPI_SLAVE_PERIPH_MAX_READ_2048B:
 145                 printk(BIOS_DEBUG, "2048 bytes\n");
 146                 break;
 147         case ESPI_SLAVE_PERIPH_MAX_READ_4096B:
 148                 printk(BIOS_DEBUG, "4096 bytes\n");
 149                 break;
 150         default:
 151                 printk(BIOS_DEBUG, "Unknown\n");
 152         }
 153
 154         printk(BIOS_DEBUG, "    Peripheral Channel Maximum Payload Size Selected: ");
 155         payload_size = config & ESPI_SLAVE_PERIPH_MAX_PAYLOAD_SIZE_SEL_MASK;
 156         switch (payload_size) {
 157         case ESPI_SLAVE_PERIPH_MAX_PAYLOAD_SIZE_SEL_64B:
 158                 printk(BIOS_DEBUG, "64 bytes\n");
 159                 break;
 160         case ESPI_SLAVE_PERIPH_MAX_PAYLOAD_SIZE_SEL_128B:
 161                 printk(BIOS_DEBUG, "128 bytes\n");
 162                 break;
 163         case ESPI_SLAVE_PERIPH_MAX_PAYLOAD_SIZE_SEL_256B:
 164                 printk(BIOS_DEBUG, "256 bytes\n");
 165                 break;
 166         default:
 167                 printk(BIOS_DEBUG, "Unknown\n");
 168         }
 169
 170         printk(BIOS_DEBUG, "    Peripheral Channel Maximum Payload Size Supported: ");
 171         payload_size = config & ESPI_SLAVE_PERIPH_MAX_PAYLOAD_SIZE_SUPP_MASK;
 172         switch (payload_size) {
 173         case ESPI_SLAVE_PERIPH_MAX_PAYLOAD_SIZE_SUPP_64B:
 174                 printk(BIOS_DEBUG, "64 bytes\n");
 175                 break;
 176         case ESPI_SLAVE_PERIPH_MAX_PAYLOAD_SIZE_SUPP_128B:
 177                 printk(BIOS_DEBUG, "128 bytes\n");
 178                 break;
 179         case ESPI_SLAVE_PERIPH_MAX_PAYLOAD_SIZE_SUPP_256B:
 180                 printk(BIOS_DEBUG, "256 bytes\n");
 181                 break;
 182         default:
 183                 printk(BIOS_DEBUG, "Unknown\n");
 184         }
 185
 186         printk(BIOS_DEBUG, "    Bus master: ");
 187         if (config & ESPI_SLAVE_PERIPH_BUS_MASTER_ENABLE)
 188                 printk(BIOS_DEBUG, "enabled\n");
 189         else
 190                 printk(BIOS_DEBUG, "disabled\n");
 191
 192         printk(BIOS_DEBUG, "    Peripheral Channel: ");
 193         if (config & ESPI_SLAVE_CHANNEL_READY)
 194                 printk(BIOS_DEBUG, "ready\n");
 195         else
 196                 printk(BIOS_DEBUG, "not ready\n");
 197
 198         printk(BIOS_DEBUG, "    Peripheral Channel: ");
 199         if (config & ESPI_SLAVE_CHANNEL_ENABLE)
 200                 printk(BIOS_DEBUG, "enabled\n");
 201         else
 202                 printk(BIOS_DEBUG, "disabled\n");
 203 }