soc/intel/xeon_sp/skx: Use Kconfig symbol
[coreboot2.git] / src / soc / amd / phoenix / aoac.c
blobd63ca625878329545a27f13d1ad60fcf62c1fa3b
1 /* SPDX-License-Identifier: GPL-2.0-only */
3 #include <stdint.h>
4 #include <amdblocks/acpimmio.h>
5 #include <amdblocks/aoac.h>
6 #include <soc/aoac_defs.h>
7 #include <soc/southbridge.h>
8 #include <delay.h>
10 #define FCH_AOAC_UART_FOR_CONSOLE \
11 (CONFIG_UART_FOR_CONSOLE == 0 ? FCH_AOAC_DEV_UART0 \
12 : CONFIG_UART_FOR_CONSOLE == 1 ? FCH_AOAC_DEV_UART1 \
13 : CONFIG_UART_FOR_CONSOLE == 2 ? FCH_AOAC_DEV_UART2 \
14 : CONFIG_UART_FOR_CONSOLE == 3 ? FCH_AOAC_DEV_UART3 \
15 : CONFIG_UART_FOR_CONSOLE == 4 ? FCH_AOAC_DEV_UART4 \
16 : -1)
17 #if CONFIG(AMD_SOC_CONSOLE_UART) && FCH_AOAC_UART_FOR_CONSOLE == -1
18 # error Unsupported UART_FOR_CONSOLE chosen
19 #endif
22 * Table of devices that need their AOAC registers enabled and waited
23 * upon (usually about .55 milliseconds). Instead of individual delays
24 * waiting for each device to become available, a single delay will be
25 * executed. The console UART is handled separately from this table.
27 * TODO: Find out which I2C controllers we really need to enable here.
29 static const unsigned int aoac_devs[] = {
30 FCH_AOAC_DEV_AMBA,
31 FCH_AOAC_DEV_I2C0,
32 FCH_AOAC_DEV_I2C1,
33 FCH_AOAC_DEV_I2C2,
34 FCH_AOAC_DEV_I2C3,
35 FCH_AOAC_DEV_ESPI,
38 void wait_for_aoac_enabled(unsigned int dev)
40 while (!is_aoac_device_enabled(dev))
41 udelay(100);
44 void enable_aoac_devices(void)
46 unsigned int i;
48 for (i = 0; i < ARRAY_SIZE(aoac_devs); i++)
49 power_on_aoac_device(aoac_devs[i]);
51 if (CONFIG(AMD_SOC_CONSOLE_UART))
52 power_on_aoac_device(FCH_AOAC_UART_FOR_CONSOLE);
54 /* Wait for AOAC devices to indicate power and clock OK */
55 for (i = 0; i < ARRAY_SIZE(aoac_devs); i++)
56 wait_for_aoac_enabled(aoac_devs[i]);
58 if (CONFIG(AMD_SOC_CONSOLE_UART))
59 wait_for_aoac_enabled(FCH_AOAC_UART_FOR_CONSOLE);