src/soc/amd/phoenix/i2c.c

   1 /* SPDX-License-Identifier: GPL-2.0-only */
   2
   3 #include <amdblocks/i2c.h>
   4 #include <console/console.h>
   5 #include <soc/i2c.h>
   6 #include <soc/southbridge.h>
   7 #include <static.h>
   8 #include "chip.h"
   9
  10 /* Table to switch SCL pins to outputs to initially reset the I2C peripherals */
  11 static const struct soc_i2c_scl_pin i2c_scl_pins[] = {
  12         I2C_RESET_SCL_PIN(I2C0_SCL_PIN, GPIO_I2C0_SCL),
  13         I2C_RESET_SCL_PIN(I2C1_SCL_PIN, GPIO_I2C1_SCL),
  14         I2C_RESET_SCL_PIN(I2C2_SCL_PIN, GPIO_I2C2_SCL),
  15         I2C_RESET_SCL_PIN(I2C3_SCL_PIN, GPIO_I2C3_SCL),
  16 };
  17
  18 #if ENV_X86
  19 static const struct soc_i2c_ctrlr_info i2c_ctrlr[I2C_CTRLR_COUNT] = {
  20         { I2C_MASTER_MODE, APU_I2C0_BASE, "I2C0" },
  21         { I2C_MASTER_MODE, APU_I2C1_BASE, "I2C1" },
  22         { I2C_MASTER_MODE, APU_I2C2_BASE, "I2C2" },
  23         { I2C_MASTER_MODE, APU_I2C3_BASE, "I2C3" }
  24 };
  25 #else
  26 static struct soc_i2c_ctrlr_info i2c_ctrlr[I2C_CTRLR_COUNT] = {
  27         { I2C_MASTER_MODE, 0, "" },
  28         { I2C_MASTER_MODE, 0, "" },
  29         { I2C_MASTER_MODE, 0, "" },
  30         { I2C_MASTER_MODE, 0, "" }
  31 };
  32
  33 void i2c_set_bar(unsigned int bus, uintptr_t bar)
  34 {
  35         if (bus >= ARRAY_SIZE(i2c_ctrlr)) {
  36                 printk(BIOS_ERR, "i2c index out of bounds: %u.", bus);
  37                 return;
  38         }
  39
  40         i2c_ctrlr[bus].bar = bar;
  41 }
  42 #endif
  43
  44 void reset_i2c_peripherals(void)
  45 {
  46         const struct soc_amd_phoenix_config *cfg = config_of_soc();
  47         struct soc_i2c_peripheral_reset_info reset_info;
  48
  49         reset_info.i2c_scl_reset_mask = cfg->i2c_scl_reset & GPIO_I2C_MASK;
  50         reset_info.i2c_scl = i2c_scl_pins;
  51         reset_info.num_pins = ARRAY_SIZE(i2c_scl_pins);
  52         sb_reset_i2c_peripherals(&reset_info);
  53 }
  54
  55 void soc_i2c_misc_init(unsigned int bus, const struct dw_i2c_bus_config *cfg)
  56 {
  57         const struct soc_amd_phoenix_config *config = config_of_soc();
  58
  59         if (bus >= ARRAY_SIZE(config->i2c_pad))
  60                 return;
  61
  62         fch_i23c_pad_init(bus, cfg->speed, &config->i2c_pad[bus]);
  63 }
  64
  65 const struct soc_i2c_ctrlr_info *soc_get_i2c_ctrlr_info(size_t *num_ctrlrs)
  66 {
  67         *num_ctrlrs = ARRAY_SIZE(i2c_ctrlr);
  68         return i2c_ctrlr;
  69 }
  70
  71 const struct dw_i2c_bus_config *soc_get_i2c_bus_config(size_t *num_buses)
  72 {
  73         const struct soc_amd_phoenix_config *config = config_of_soc();
  74
  75         *num_buses = ARRAY_SIZE(config->i2c);
  76         return config->i2c;
  77 }