soc/intel/xeon_sp/skx: Use Kconfig symbol
[coreboot2.git] / src / soc / amd / picasso / Makefile.mk
blob7ba975f0e478f1a4ef9842b6e32ea7c702182e9a
1 # SPDX-License-Identifier: BSD-3-Clause
3 ifeq ($(CONFIG_SOC_AMD_PICASSO),y)
5 subdirs-$(CONFIG_VBOOT_STARTS_BEFORE_BOOTBLOCK) += psp_verstage
6 subdirs-$(CONFIG_VBOOT_STARTS_BEFORE_BOOTBLOCK) += ../common/psp_verstage
8 # Beware that all-y also adds the compilation unit to verstage on PSP
9 all-y += aoac.c
10 all-y += config.c
11 all-y += i2c.c
13 # all_x86-y adds the compilation unit to all stages that run on the x86 cores
14 all_x86-y += gpio.c
15 all_x86-y += uart.c
17 bootblock-y += early_fch.c
19 romstage-y += fsp_m_params.c
21 ramstage-$(CONFIG_HAVE_ACPI_TABLES) += acpi.c
22 ramstage-$(CONFIG_HAVE_ACPI_TABLES) += acpi_crat.c
23 ramstage-y += chip.c
24 ramstage-y += cpu.c
25 ramstage-y += fch.c
26 ramstage-y += fsp_s_params.c
27 ramstage-y += graphics.c
28 ramstage-y += mca.c
29 ramstage-y += memmap.c
30 ramstage-y += pcie_gpp.c
31 ramstage-y += root_complex.c
32 ramstage-y += sata.c
33 ramstage-y += soc_util.c
34 ramstage-y += xhci.c
36 smm-y += smihandler.c
37 ifeq ($(CONFIG_DEBUG_SMI),y)
38 smm-y += uart.c
39 endif
40 smm-y += gpio.c
41 smm-y += root_complex.c
43 CPPFLAGS_common += -I$(src)/soc/amd/picasso/include
44 CPPFLAGS_common += -I$(src)/soc/amd/picasso/acpi
45 CPPFLAGS_common += -I$(src)/vendorcode/amd/fsp/picasso
46 CPPFLAGS_common += -I$(src)/vendorcode/amd/fsp/common
48 # 0x40 accounts for the cbfs_file struct + filename + metadata structs, aligned to 64 bytes
49 # Building the cbfs image will fail if the offset isn't large enough
50 AMD_FW_AB_POSITION := 0x40
52 PICASSO_FW_A_POSITION=$(call int-add, \
53 $(call get_fmap_value,FMAP_SECTION_FW_MAIN_A_START) $(AMD_FW_AB_POSITION))
55 PICASSO_FW_B_POSITION=$(call int-add, \
56 $(call get_fmap_value,FMAP_SECTION_FW_MAIN_B_START) $(AMD_FW_AB_POSITION))
59 # PSP Directory Table items
61 # Certain ordering requirements apply, however these are ensured by amdfwtool.
62 # For more information see "AMD Platform Security Processor BIOS Architecture
63 # Design Guide for AMD Family 17h Processors" (PID #55758, NDA only).
66 ifeq ($(CONFIG_PSP_UNLOCK_SECURE_DEBUG),y)
67 # Enable secure debug unlock
68 PSP_SOFTFUSE_BITS += 0
69 OPT_TOKEN_UNLOCK="--token-unlock"
70 endif
72 ifeq ($(CONFIG_PSP_LOAD_MP2_FW),y)
73 OPT_PSP_LOAD_MP2_FW="--load-mp2-fw"
74 else
75 # Disable MP2 firmware loading
76 PSP_SOFTFUSE_BITS += 29
77 endif
79 # Use additional Soft Fuse bits specified in Kconfig
80 PSP_SOFTFUSE_BITS += $(call strip_quotes, $(CONFIG_PSP_SOFTFUSE_BITS))
82 ifeq ($(CONFIG_PSP_LOAD_S0I3_FW),y)
83 OPT_PSP_LOAD_S0I3_FW="--load-s0i3"
84 endif
86 # type = 0x04
87 # The flashmap section used for this is expected to be named PSP_NVRAM
88 PSP_NVRAM_BASE=$(call get_fmap_value,FMAP_SECTION_PSP_NVRAM_START)
89 PSP_NVRAM_SIZE=$(call get_fmap_value,FMAP_SECTION_PSP_NVRAM_SIZE)
91 # type = 0x3a
92 ifeq ($(CONFIG_HAVE_PSP_WHITELIST_FILE),y)
93 PSP_WHITELIST_FILE=$(CONFIG_PSP_WHITELIST_FILE)
94 endif
96 # type = 0x54
97 # The flashmap section used for this is expected to be named PSP_RPMC_NVRAM
98 PSP_RPMC_NVRAM_BASE=$(call get_fmap_value,FMAP_SECTION_PSP_RPMC_NVRAM_START)
99 PSP_RPMC_NVRAM_SIZE=$(call get_fmap_value,FMAP_SECTION_PSP_RPMC_NVRAM_SIZE)
102 # BIOS Directory Table items - proper ordering is managed by amdfwtool
105 # type = 0x7
106 # RSA 2048 signature
107 #ifeq ($(CONFIG_PSP_PLATFORM_SECURE_BOOT),y)
108 PSP_BIOS_SIG_SIZE=0x100
109 #endif
111 # type = 0x60
112 PSP_APCB_FILES=$(APCB_SOURCES)
114 # type = 0x61
115 PSP_APOB_BASE=$(CONFIG_PSP_APOB_DRAM_ADDRESS)
117 # type = 0x62
118 PSP_BIOSBIN_FILE=$(obj)/amd_biospsp.img
119 PSP_ELF_FILE=$(objcbfs)/bootblock.elf
120 PSP_BIOSBIN_SIZE=$(shell $(READELF_bootblock) -Wl $(PSP_ELF_FILE) | grep LOAD | awk '{print $$5}')
121 PSP_BIOSBIN_DEST=$(shell $(READELF_bootblock) -Wl $(PSP_ELF_FILE) | grep LOAD | awk '{print $$3}')
123 ifneq ($(CONFIG_SOC_AMD_COMMON_BLOCK_APOB_NV_DISABLE),y)
124 # type = 0x63 - construct APOB NV base/size from flash map
125 # The flashmap section used for this is expected to be named RW_MRC_CACHE
126 APOB_NV_SIZE=$(call get_fmap_value,FMAP_SECTION_RW_MRC_CACHE_SIZE)
127 APOB_NV_BASE=$(call get_fmap_value,FMAP_SECTION_RW_MRC_CACHE_START)
128 endif # !CONFIG_SOC_AMD_COMMON_BLOCK_APOB_NV_DISABLE
130 ifeq ($(CONFIG_VBOOT_STARTS_BEFORE_BOOTBLOCK),y)
131 # type = 0x6B - PSP Shared memory location
132 ifneq ($(CONFIG_PSP_SHAREDMEM_SIZE),0x0)
133 PSP_SHAREDMEM_SIZE=$(CONFIG_PSP_SHAREDMEM_SIZE)
134 PSP_SHAREDMEM_BASE=$(shell awk '$$3 == "_psp_sharedmem_dram" {printf "0x" $$1}' $(objcbfs)/bootblock.map)
135 endif
137 # type = 0x52 - PSP Bootloader Userspace Application (verstage)
138 PSP_VERSTAGE_FILE=$(call strip_quotes,$(CONFIG_PSP_VERSTAGE_FILE))
139 PSP_VERSTAGE_SIG_FILE=$(call strip_quotes,$(CONFIG_PSP_VERSTAGE_SIGNING_TOKEN))
140 endif # CONFIG_VBOOT_STARTS_BEFORE_BOOTBLOCK
143 # Helper function to return a value with given bit set
144 # Soft Fuse type = 0xb - See #55758 (NDA) for bit definitions.
145 set-bit=$(call int-shift-left, 1 $(call _toint,$1))
146 PSP_SOFTFUSE=$(shell A=$(call int-add, \
147 $(foreach bit,$(sort $(PSP_SOFTFUSE_BITS)),$(call set-bit,$(bit)))); printf "0x%x" $$A)
150 # Build the arguments to amdfwtool (order is unimportant). Missing file names
151 # result in empty OPT_ variables, i.e. the argument is not passed to amdfwtool.
154 add_opt_prefix=$(if $(call strip_quotes, $(1)), $(2) $(call strip_quotes, $(1)), )
156 OPT_PSP_NVRAM_BASE=$(call add_opt_prefix, $(PSP_NVRAM_BASE), --nvram-base)
157 OPT_PSP_NVRAM_SIZE=$(call add_opt_prefix, $(PSP_NVRAM_SIZE), --nvram-size)
159 OPT_PSP_RPMC_NVRAM_BASE=$(call add_opt_prefix, $(PSP_RPMC_NVRAM_BASE), --rpmc-nvram-base)
160 OPT_PSP_RPMC_NVRAM_SIZE=$(call add_opt_prefix, $(PSP_RPMC_NVRAM_SIZE), --rpmc-nvram-size)
162 OPT_VERSTAGE_FILE=$(call add_opt_prefix, $(PSP_VERSTAGE_FILE), --verstage)
163 OPT_VERSTAGE_SIG_FILE=$(call add_opt_prefix, $(PSP_VERSTAGE_SIG_FILE), --verstage_sig)
165 OPT_PSP_APCB_FILES=$(foreach i, $(shell seq $(words $(PSP_APCB_FILES))), \
166 $(call add_opt_prefix, $(word $(i), $(PSP_APCB_FILES)), \
167 --instance $(shell printf "%x" $$(($(i)-1))) --apcb ) )
168 OPT_PSP_APCB_FILES_BK=$(foreach i, $(shell seq $(words $(PSP_APCB_FILES))), \
169 $(call add_opt_prefix, $(word $(i), $(PSP_APCB_FILES)), \
170 --instance $(shell printf "1%x" $$(($(i)-1))) --apcb ) )
172 OPT_APOB_ADDR=$(call add_opt_prefix, $(PSP_APOB_BASE), --apob-base)
173 OPT_PSP_BIOSBIN_FILE=$(call add_opt_prefix, $(PSP_BIOSBIN_FILE), --bios-bin)
174 OPT_PSP_BIOSBIN_DEST=$(call add_opt_prefix, $(PSP_BIOSBIN_DEST), --bios-bin-dest)
175 OPT_PSP_BIOSBIN_SIZE=$(call add_opt_prefix, $(PSP_BIOSBIN_SIZE), --bios-uncomp-size)
177 OPT_PSP_BIOS_SIG_SIZE=$(call add_opt_prefix, $(PSP_BIOS_SIG_SIZE), --bios-sig-size)
178 OPT_PSP_SHAREDMEM_BASE=$(call add_opt_prefix, $(PSP_SHAREDMEM_BASE), --sharedmem)
179 OPT_PSP_SHAREDMEM_SIZE=$(call add_opt_prefix, $(PSP_SHAREDMEM_SIZE), --sharedmem-size)
180 OPT_APOB_NV_SIZE=$(call add_opt_prefix, $(APOB_NV_SIZE), --apob-nv-size)
181 OPT_APOB_NV_BASE=$(call add_opt_prefix, $(APOB_NV_BASE),--apob-nv-base)
182 OPT_EFS_SPI_READ_MODE=$(call add_opt_prefix, $(CONFIG_EFS_SPI_READ_MODE), --spi-read-mode)
183 OPT_EFS_SPI_SPEED=$(call add_opt_prefix, $(CONFIG_EFS_SPI_SPEED), --spi-speed)
184 OPT_EFS_SPI_MICRON_FLAG=$(call add_opt_prefix, $(CONFIG_EFS_SPI_MICRON_FLAG), --spi-micron-flag)
186 OPT_PSP_SOFTFUSE=$(call add_opt_prefix, $(PSP_SOFTFUSE), --soft-fuse)
188 ifeq ($(CONFIG_VBOOT),)
189 OPT_APOB0_NV_SIZE=$(OPT_APOB_NV_SIZE)
190 OPT_APOB0_NV_BASE=$(OPT_APOB_NV_BASE)
191 endif
193 OPT_WHITELIST_FILE=$(call add_opt_prefix, $(PSP_WHITELIST_FILE), --whitelist)
195 AMDFW_COMMON_ARGS=$(OPT_PSP_APCB_FILES) \
196 $(OPT_PSP_NVRAM_BASE) \
197 $(OPT_PSP_NVRAM_SIZE) \
198 $(OPT_PSP_RPMC_NVRAM_BASE) \
199 $(OPT_PSP_RPMC_NVRAM_SIZE) \
200 $(OPT_PSP_APCB_FILES_BK) \
201 $(OPT_APOB_ADDR) \
202 $(OPT_DEBUG_AMDFWTOOL) \
203 $(OPT_PSP_BIOSBIN_FILE) \
204 $(OPT_PSP_BIOSBIN_DEST) \
205 $(OPT_PSP_BIOSBIN_SIZE) \
206 $(OPT_PSP_BIOS_SIG_SIZE) \
207 $(OPT_PSP_SOFTFUSE) \
208 --use-pspsecureos \
209 $(OPT_PSP_LOAD_MP2_FW) \
210 $(OPT_PSP_LOAD_S0I3_FW) \
211 $(OPT_WHITELIST_FILE) \
212 $(OPT_PSP_SHAREDMEM_BASE) \
213 $(OPT_PSP_SHAREDMEM_SIZE) \
214 $(OPT_TOKEN_UNLOCK) \
215 $(OPT_EFS_SPI_READ_MODE) \
216 $(OPT_EFS_SPI_SPEED) \
217 $(OPT_EFS_SPI_MICRON_FLAG) \
218 --config $(CONFIG_AMDFW_CONFIG_FILE) \
219 --flashsize $(CONFIG_ROM_SIZE)
221 $(obj)/amdfw.rom: $(call strip_quotes, $(PSP_BIOSBIN_FILE)) \
222 $(PSP_VERSTAGE_FILE) \
223 $(PSP_VERSTAGE_SIG_FILE) \
224 $$(PSP_APCB_FILES) \
225 $(DEP_FILES) \
226 $(AMDFWTOOL) \
227 $(obj)/fmap_config.h \
228 $(objcbfs)/bootblock.elf # this target also creates the .map file
229 $(if $(PSP_APCB_FILES), ,$(error APCB_SOURCES is not set))
230 rm -f $@
231 @printf " AMDFWTOOL $(subst $(obj)/,,$(@))\n"
232 $(AMDFWTOOL) \
233 $(AMDFW_COMMON_ARGS) \
234 $(OPT_APOB0_NV_SIZE) \
235 $(OPT_APOB0_NV_BASE) \
236 $(OPT_VERSTAGE_FILE) \
237 $(OPT_VERSTAGE_SIG_FILE) \
238 --location $(CONFIG_AMD_FWM_POSITION) \
239 --output $@
241 $(PSP_BIOSBIN_FILE): $(PSP_ELF_FILE) $(AMDCOMPRESS)
242 rm -f $@
243 @printf " AMDCOMPRS $(subst $(obj)/,,$(@))\n"
244 $(AMDCOMPRESS) --infile $(PSP_ELF_FILE) --outfile $@ --compress \
245 --maxsize $(PSP_BIOSBIN_SIZE)
247 $(obj)/amdfw_a.rom: $(obj)/amdfw.rom
248 rm -f $@
249 @printf " AMDFWTOOL $(subst $(obj)/,,$(@))\n"
250 $(AMDFWTOOL) \
251 $(AMDFW_COMMON_ARGS) \
252 $(OPT_APOB_NV_SIZE) \
253 $(OPT_APOB_NV_BASE) \
254 --location $(call _tohex,$(PICASSO_FW_A_POSITION)) \
255 --anywhere \
256 --output $@
258 $(obj)/amdfw_b.rom: $(obj)/amdfw.rom
259 rm -f $@
260 @printf " AMDFWTOOL $(subst $(obj)/,,$(@))\n"
261 $(AMDFWTOOL) \
262 $(AMDFW_COMMON_ARGS) \
263 $(OPT_APOB_NV_SIZE) \
264 $(OPT_APOB_NV_BASE) \
265 --location $(call _tohex,$(PICASSO_FW_B_POSITION)) \
266 --anywhere \
267 --output $@
269 ifeq ($(CONFIG_VBOOT_SLOTS_RW_A)$(CONFIG_VBOOT_STARTS_BEFORE_BOOTBLOCK),yy)
270 cbfs-files-y += apu/amdfw_a
271 apu/amdfw_a-file := $(obj)/amdfw_a.rom
272 apu/amdfw_a-position := $(AMD_FW_AB_POSITION)
273 apu/amdfw_a-type := raw
274 endif
276 ifeq ($(CONFIG_VBOOT_SLOTS_RW_AB)$(CONFIG_VBOOT_STARTS_BEFORE_BOOTBLOCK),yy)
277 cbfs-files-y += apu/amdfw_b
278 apu/amdfw_b-file := $(obj)/amdfw_b.rom
279 apu/amdfw_b-position := $(AMD_FW_AB_POSITION)
280 apu/amdfw_b-type := raw
281 endif
283 endif # ($(CONFIG_SOC_AMD_PICASSO),y)