src/soc/amd/picasso/smihandler.c

   1 /* SPDX-License-Identifier: GPL-2.0-or-later */
   2
   3 #include <acpi/acpi.h>
   4 #include <amdblocks/acpi.h>
   5 #include <amdblocks/acpimmio.h>
   6 #include <amdblocks/psp.h>
   7 #include <amdblocks/smi.h>
   8 #include <amdblocks/smm.h>
   9 #include <arch/hlt.h>
  10 #include <arch/io.h>
  11 #include <console/console.h>
  12 #include <cpu/x86/cache.h>
  13 #include <cpu/x86/smm.h>
  14 #include <elog.h>
  15 #include <soc/smi.h>
  16 #include <soc/smu.h>
  17 #include <soc/southbridge.h>
  18 #include <types.h>
  19
  20 /*
  21  * Both the psp_notify_sx_info and the smu_sx_entry call will clobber the SMN index register
  22  * during the SMN accesses. Since the SMI handler is the last thing that gets called before
  23  * entering S3, this won't interfere with any indirect SMN accesses via the same register pair.
  24  */
  25 static void fch_slp_typ_handler(void)
  26 {
  27         uint32_t pci_ctrl, reg32;
  28         uint16_t pm1cnt, reg16;
  29         uint8_t slp_typ, rst_ctrl;
  30
  31         /* Figure out SLP_TYP */
  32         pm1cnt = acpi_read16(MMIO_ACPI_PM1_CNT_BLK);
  33         printk(BIOS_SPEW, "SMI#: SLP = 0x%04x\n", pm1cnt);
  34         slp_typ = acpi_sleep_from_pm1(pm1cnt);
  35
  36         /* Do any mainboard sleep handling */
  37         mainboard_smi_sleep(slp_typ);
  38
  39         switch (slp_typ) {
  40         case ACPI_S0:
  41                 printk(BIOS_DEBUG, "SMI#: Entering S0 (On)\n");
  42                 break;
  43         case ACPI_S3:
  44                 printk(BIOS_DEBUG, "SMI#: Entering S3 (Suspend-To-RAM)\n");
  45                 break;
  46         case ACPI_S4:
  47                 printk(BIOS_DEBUG, "SMI#: Entering S4 (Suspend-To-Disk)\n");
  48                 break;
  49         case ACPI_S5:
  50                 printk(BIOS_DEBUG, "SMI#: Entering S5 (Soft Power off)\n");
  51                 break;
  52         default:
  53                 printk(BIOS_DEBUG, "SMI#: ERROR: SLP_TYP reserved\n");
  54                 break;
  55         }
  56
  57         if (slp_typ >= ACPI_S3) {
  58                 /* Sleep Type Elog S3, S4, and S5 entry */
  59                 elog_gsmi_add_event_byte(ELOG_TYPE_ACPI_ENTER, slp_typ);
  60
  61                 wbinvd();
  62
  63                 clear_all_smi_status();
  64
  65                 /* Do not send SMI before AcpiPm1CntBlkx00[SlpTyp] */
  66                 pci_ctrl = pm_read32(PM_PCI_CTRL);
  67                 pci_ctrl &= ~FORCE_SLPSTATE_RETRY;
  68                 pm_write32(PM_PCI_CTRL, pci_ctrl);
  69
  70                 /* Enable SlpTyp */
  71                 rst_ctrl = pm_read8(PM_RST_CTRL1);
  72                 rst_ctrl |= SLPTYPE_CONTROL_EN;
  73                 pm_write8(PM_RST_CTRL1, rst_ctrl);
  74
  75                 /*
  76                  * Before the final command, check if there's pending wake
  77                  * event. Read enable first, so that reading the actual status
  78                  * is as close as possible to entering S3. The idea is to
  79                  * minimize the opportunity for a wake event to happen before
  80                  * actually entering S3. If there's a pending wake event, log
  81                  * it and continue normal path. S3 will fail and the wake event
  82                  * becomes a SCI.
  83                  */
  84                 if (CONFIG(ELOG_GSMI)) {
  85                         reg16 = acpi_read16(MMIO_ACPI_PM1_EN);
  86                         reg16 &= acpi_read16(MMIO_ACPI_PM1_STS);
  87                         if (reg16)
  88                                 elog_add_extended_event(
  89                                                 ELOG_SLEEP_PENDING_PM1_WAKE,
  90                                                 (u32)reg16);
  91
  92                         reg32 = acpi_read32(MMIO_ACPI_GPE0_EN);
  93                         reg32 &= acpi_read32(MMIO_ACPI_GPE0_STS);
  94                         if (reg32)
  95                                 elog_add_extended_event(
  96                                                 ELOG_SLEEP_PENDING_GPE0_WAKE,
  97                                                 reg32);
  98                 } /* if (CONFIG(ELOG_GSMI)) */
  99
 100                 if (slp_typ == ACPI_S3)
 101                         psp_notify_sx_info(ACPI_S3);
 102
 103                 smu_sx_entry(); /* Leave SlpTypeEn clear, SMU will set */
 104                 printk(BIOS_ERR, "System did not go to sleep\n");
 105
 106                 hlt();
 107         }
 108 }
 109
 110 /*
 111  * Table of functions supported in the SMI handler.  Note that SMI source setup
 112  * in fch.c is unrelated to this list.
 113  */
 114 static const struct smi_sources_t smi_sources[] = {
 115         { .type = SMITYPE_SMI_CMD_PORT, .handler = fch_apmc_smi_handler },
 116         { .type = SMITYPE_SLP_TYP, .handler = fch_slp_typ_handler},
 117         { .type = SMITYPE_PSP, .handler = psp_smi_handler },
 118 };
 119
 120 void *get_smi_source_handler(int source)
 121 {
 122         size_t i;
 123
 124         for (i = 0 ; i < ARRAY_SIZE(smi_sources) ; i++)
 125                 if (smi_sources[i].type == source)
 126                         return smi_sources[i].handler;
 127
 128         return NULL;
 129 }