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soc/intel/xeon_sp/ibl: Update registers for reach bootable
[coreboot2.git] / payloads / libpayload / configs / config.gru
blobf4f9bfc4719adcd6dddb0d7de694e4d3ff254696
1 CONFIG_LP_CHROMEOS=y
2 CONFIG_LP_ARCH_ARM64=y
3 CONFIG_LP_8250_SERIAL_CONSOLE=y
4 CONFIG_LP_TIMER_RK3399=y
5 CONFIG_LP_USB_EHCI=y
6 CONFIG_LP_USB_OHCI=y
7 CONFIG_LP_USB_XHCI=y
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