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soc/intel/xeon_sp/ibl: Update registers for reach bootable
[coreboot2.git]
/
payloads
/
libpayload
/
configs
/
config.nyan
blob
caad2b61811ae4d619cada43c615ca90e9723cfc
1
CONFIG_LP_CHROMEOS=y
2
CONFIG_LP_ARCH_ARM=y
3
CONFIG_LP_8250_SERIAL_CONSOLE=y
4
CONFIG_LP_TIMER_TEGRA_1US=y
5
CONFIG_LP_USB_EHCI=y
6
CONFIG_LP_USB_EHCI_HOSTPC_ROOT_HUB_TT=y