soc/intel/common: Add PCIe device IDs for Snow Ridge
[coreboot2.git] / src / include / device / usbc_mux.h
blobcf109b7fe8fde4e983893256da39b4cace01f353
1 /* SPDX-License-Identifier: GPL-2.0-only */
3 #ifndef __USBC_MUX_H__
4 #define __USBC_MUX_H__
6 /* struct to hold all USB-C mux related variables */
7 struct usbc_mux_info {
8 bool dp; /* DP connected */
9 bool usb; /* USB connected */
10 bool cable; /* 0 = Passive cable, 1 = Active cable */
11 bool polarity; /* Polarity of connected device. 0 = Normal, 1 = Flipped */
12 bool hpd_lvl; /* HPD Level assert */
13 bool hpd_irq; /* HPD IRQ assert */
14 bool ufp; /* 0 = DFP, 1 = UFP */
15 bool dbg_acc; /* Debug Accessory. 0 = Disable, 1 = Enable */
16 uint8_t dp_pin_mode; /* DP pin assignments
17 0h: Reserved.
18 1h: Pin Assignment A.
19 2h: Pin Assignment B.
20 3h: Pin Assignment C.
21 4h: Pin Assignment D.
22 5h: Pin Assignment E.
23 6h: Pin Assignment F.
24 7-Fh: Reserved. */
26 struct usbc_mux_ops {
28 * Get mux information on a given port.
30 * Return value:
31 * -1 = error
32 * 0 = success
34 int (*get_mux_info)(int port, struct usbc_mux_info *info);
37 struct usbc_dp_ops {
39 * Wait up to `timeout_ms` for DP connection to be ready on any available port.
41 * Return value:
42 * -1 = error
43 * 0 = no DP connection
44 * <bit mask> = mask for ports that are ready in DP mode.
46 int (*wait_for_connection)(long timeout_ms);
49 * Enter DP mode on a given `port`.
51 * Return value:
52 * -1 = error
53 * 0 = success
55 int (*enter_dp_mode)(int port);
58 * Wait up to `timeout_ms` for DP mode entry on a given port.
60 * Return value:
61 * -1 = timeout
62 * 0 = success
64 int (*wait_for_dp_mode_entry)(int port, long timeout_ms);
67 * Wait up to `timeout_ms` for HPD on a given port.
69 * Return value:
70 * -1 = timeout
71 * 0 = success
73 int (*wait_for_hpd)(int port, long timeout_ms);
76 struct usbc_ops {
77 struct usbc_mux_ops mux_ops;
78 struct usbc_dp_ops dp_ops;
81 const struct usbc_ops *usbc_get_ops(void);
83 #endif /* __USBC_MUX_H__ */