src/mainboard/amd/gardenia/OemCustomize.c

   1 /* SPDX-License-Identifier: GPL-2.0-only */
   2
   3 #include <soc/amd/stoneyridge/chip.h>
   4 #include <amdblocks/agesawrapper.h>
   5
   6 #define DIMMS_PER_CHANNEL 2
   7 #if DIMMS_PER_CHANNEL > MAX_DIMMS_PER_CH
   8 #error "Too many DIMM sockets defined for the mainboard"
   9 #endif
  10
  11 static const PSO_ENTRY DDR4PlatformMemoryConfiguration[] = {
  12         DRAM_TECHNOLOGY(ANY_SOCKET, DDR4_TECHNOLOGY),
  13         NUMBER_OF_DIMMS_SUPPORTED(ANY_SOCKET, ANY_CHANNEL, DIMMS_PER_CHANNEL),
  14         NUMBER_OF_CHANNELS_SUPPORTED(ANY_SOCKET, MAX_DRAM_CH),
  15         MOTHER_BOARD_LAYERS(LAYERS_6),
  16         MEMCLK_DIS_MAP(ANY_SOCKET, ANY_CHANNEL,
  17                                 0xff, 0xff, 0xff, 0xff, 0x00, 0x00, 0x00, 0x00),
  18         CKE_TRI_MAP(ANY_SOCKET, ANY_CHANNEL, 0xff, 0xff, 0xff, 0xff),
  19         ODT_TRI_MAP(ANY_SOCKET, ANY_CHANNEL, 0xff, 0xff, 0xff, 0xff),
  20         CS_TRI_MAP(ANY_SOCKET, ANY_CHANNEL,
  21                                 0xff, 0xff, 0xff, 0xff, 0x00, 0x00, 0x00, 0x00),
  22         PSO_END
  23 };
  24
  25 void OemPostParams(AMD_POST_PARAMS *PostParams)
  26 {
  27         PostParams->MemConfig.PlatformMemoryConfiguration =
  28                                 (PSO_ENTRY *)DDR4PlatformMemoryConfiguration;
  29 }