src/mainboard/google/brya/chromeos-nissa-32MiB.fmd

   1 FLASH 32M {
   2         SI_ALL 3712K {
   3                 SI_DESC 4K
   4                 SI_ME
   5         }
   6         SI_BIOS 29056K {
   7                 RW_SECTION_A 4376K {
   8                         VBLOCK_A 8K
   9                         FW_MAIN_A(CBFS)
  10                         RW_FWID_A 64
  11                 }
  12                 RW_LEGACY(CBFS) 1M
  13                 RW_MISC 152K {
  14                         UNIFIED_MRC_CACHE(PRESERVE) 128K {
  15                                 RECOVERY_MRC_CACHE 64K
  16                                 RW_MRC_CACHE 64K
  17                         }
  18                         RW_ELOG(PRESERVE) 4K
  19                         RW_SHARED 4K {
  20                                 SHARED_DATA 4K
  21                         }
  22                         RW_VPD(PRESERVE) 8K
  23                         RW_NVRAM(PRESERVE) 8K
  24                 }
  25                 # RW UNUSED Region 1.
  26                 RW_UNUSED_1 7120K
  27                 # This section starts at the 16M boundary in SPI flash.
  28                 # ADL does not support a region crossing this boundary,
  29                 # because the SPI flash is memory-mapped into two non-
  30                 # contiguous windows.
  31                 RW_SECTION_B 4376K {
  32                         VBLOCK_B 8K
  33                         FW_MAIN_B(CBFS)
  34                         RW_FWID_B 64
  35                 }
  36                 # RW UNUSED Region 2.
  37                 RW_UNUSED_2 7912K
  38                 # Make WP_RO region align with SPI vendor
  39                 # memory protected range specification.
  40                 WP_RO 4M {
  41                         RO_VPD(PRESERVE) 16K
  42                         RO_GSCVD 8K
  43                         RO_SECTION {
  44                                 FMAP 2K
  45                                 RO_FRID 64
  46                                 GBB@4K 12K
  47                                 COREBOOT(CBFS)
  48                         }
  49                 }
  50         }
  51 }