cpu/x86/smm/pci_resource_store: Store DEV/VEN ID

[coreboot2.git] / src / mainboard / google / brya / variants / brask / overridetree.cb

fw_config
        field AUDIO 0 2
                option AUDIO_UNKNOWN    0
                option NAU88L25B_I2S    1
        end
end

chip soc/intel/alderlake
        register "sagv" = "SaGv_Enabled"

        device domain 0 on
                device ref dtt on
                        chip drivers/intel/dptf
                                ## sensor information
                                register "options.tsr[0].desc" = ""DRAM""
                                register "options.tsr[1].desc" = ""Charger""

                                # TODO: below values are initial reference values only
                                ## Active Policy
                                register "policies.active" = "{
                                        [0] = {
                                                .target = DPTF_CPU,
                                                .thresholds = {
                                                                TEMP_PCT(85, 90),
                                                                TEMP_PCT(80, 80),
                                                                TEMP_PCT(75, 70),
                                                }
                                        }
                                }"

                                ## Passive Policy
                                register "policies.passive" = "{
                                        [0] = DPTF_PASSIVE(CPU,         CPU,           95, 5000),
                                        [1] = DPTF_PASSIVE(CPU,         TEMP_SENSOR_0, 75, 5000),
                                        [2] = DPTF_PASSIVE(CHARGER,     TEMP_SENSOR_1, 75, 5000),
                                }"

                                ## Critical Policy
                                register "policies.critical" = "{
                                        [0] = DPTF_CRITICAL(CPU,               105, SHUTDOWN),
                                        [1] = DPTF_CRITICAL(TEMP_SENSOR_0,      85, SHUTDOWN),
                                        [2] = DPTF_CRITICAL(TEMP_SENSOR_1,      85, SHUTDOWN),
                                }"

                                register "controls.power_limits" = "{
                                        .pl1 = {
                                                        .min_power = 3000,
                                                        .max_power = 15000,
                                                        .time_window_min = 28 * MSECS_PER_SEC,
                                                        .time_window_max = 32 * MSECS_PER_SEC,
                                                        .granularity = 200,
                                                },
                                        .pl2 = {
                                                        .min_power = 55000,
                                                        .max_power = 55000,
                                                        .time_window_min = 28 * MSECS_PER_SEC,
                                                        .time_window_max = 32 * MSECS_PER_SEC,
                                                        .granularity = 1000,
                                                }
                                }"

                                ## Charger Performance Control (Control, mA)
                                register "controls.charger_perf" = "{
                                        [0] = { 255, 1700 },
                                        [1] = {  24, 1500 },
                                        [2] = {  16, 1000 },
                                        [3] = {   8,  500 }
                                }"

                                device generic 0 alias dptf_policy on end
                        end
                end
                device ref pcie_rp7 on
                        chip drivers/net
                                register "wake" = "GPE0_DW0_07"
                                register "led_feature" = "0xe0"
                                register "customized_led0" = "0x23f"
                                register "customized_led2" = "0x028"
                                register "enable_aspm_l1_2" = "1"
                                register "add_acpi_dma_property" = "true"
                                device pci 00.0 on end
                        end
                end # RTL8125 Ethernet NIC
                device ref pcie4_0 on
                        # Enable CPU PCIE RP 1 using CLK 0
                        register "cpu_pcie_rp[CPU_RP(1)]" = "{
                                .clk_req = 0,
                                .clk_src = 0,
                                .flags = PCIE_RP_LTR | PCIE_RP_AER,
                        }"
                end
                device ref tcss_dma0 on
                        chip drivers/intel/usb4/retimer
                                register "dfp[0].power_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_E4)"
                                use tcss_usb3_port1 as dfp[0].typec_port
                                device generic 0 on end
                        end
                end
                device ref tcss_dma1 on
                        chip drivers/intel/usb4/retimer
                                register "dfp[0].power_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_E4)"
                                use tcss_usb3_port3 as dfp[0].typec_port
                                device generic 0 on end
                        end
                end
                device ref cnvi_wifi on
                        chip drivers/wifi/generic
                                register "wake" = "GPE0_PME_B0"
                                device generic 0 on end
                        end
                end
                device ref i2c0 on
                        chip drivers/i2c/nau8825
                                register "irq_gpio" = "ACPI_GPIO_IRQ_LEVEL_LOW(GPP_A23)"
                                register "jkdet_enable" = "1"
                                register "jkdet_pull_enable" = "0"
                                register "jkdet_pull_up" = "0"
                                register "jkdet_polarity" = "1"      # ActiveLow
                                register "vref_impedance" = "2"      # 125kOhm
                                register "micbias_voltage" = "6"     # 2.754
                                register "sar_threshold_num" = "4"
                                register "sar_threshold[0]" = "0x0C"
                                register "sar_threshold[1]" = "0x1C"
                                register "sar_threshold[2]" = "0x38"
                                register "sar_threshold[3]" = "0x60"
                                register "sar_hysteresis" = "1"
                                register "sar_voltage" = "6"
                                register "sar_compare_time" = "0"     # 500ns
                                register "sar_sampling_time" = "0"    # 2us
                                register "short_key_debounce" = "2"   # 100ms
                                register "jack_insert_debounce" = "7" # 512ms
                                register "jack_eject_debounce" = "7"  # 512ms
                                device i2c 1a on end
                        end
                end
                device ref pcie_rp8 on
                        chip soc/intel/common/block/pcie/rtd3
                                register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_H13)"
                                register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_D18)"
                                register "srcclk_pin" = "3"
                                device generic 0 on end
                        end
                end     #PCIE8 SD card
                device ref gspi1 on
                        chip drivers/spi/acpi
                                register "name" = ""CRFP""
                                register "hid" = "ACPI_DT_NAMESPACE_HID"
                                register "uid" = "1"
                                register "compat_string" = ""google,cros-ec-spi""
                                register "irq" = "ACPI_IRQ_WAKE_LEVEL_LOW(GPP_F15_IRQ)"
                                register "wake" = "GPE0_DW2_15"
                                register "has_power_resource" = "1"
                                register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_D1)"
                                register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_D2)"
                                register "enable_delay_ms" = "3"
                                device spi 0 hidden end
                        end # FPMCU
                end
                device ref pch_espi on
                        chip ec/google/chromeec
                                use conn0 as mux_conn[0]
                                use conn1 as mux_conn[1]
                                use conn2 as mux_conn[2]
                                device pnp 0c09.0 on end
                        end
                end
                device ref pmc hidden
                        chip drivers/intel/pmc_mux
                                device generic 0 on
                                        chip drivers/intel/pmc_mux/conn
                                                use usb2_port1 as usb2_port
                                                use tcss_usb3_port1 as usb3_port
                                                device generic 0 alias conn0 on end
                                        end
                                        chip drivers/intel/pmc_mux/conn
                                                use usb2_port2 as usb2_port
                                                use tcss_usb3_port2 as usb3_port
                                                device generic 1 alias conn1 on end
                                        end
                                        chip drivers/intel/pmc_mux/conn
                                                use usb2_port3 as usb2_port
                                                use tcss_usb3_port3 as usb3_port
                                                device generic 2 alias conn2 on end
                                        end
                                end
                        end
                end
                device ref tcss_xhci on
                        chip drivers/usb/acpi
                                device ref tcss_root_hub on
                                        chip drivers/usb/acpi
                                                register "desc" = ""USB3 Type-C Port C0 (MLB)""
                                                register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
                                                register "use_custom_pld" = "true"
                                                register "custom_pld" = "ACPI_PLD_TYPE_C(BACK, CENTER, ACPI_PLD_GROUP(1, 1))"
                                                device ref tcss_usb3_port1 on end
                                        end
                                        chip drivers/usb/acpi
                                                register "desc" = ""USB3 Type-C Port C1 (MLB)""
                                                register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
                                                register "use_custom_pld" = "true"
                                                register "custom_pld" = "ACPI_PLD_TYPE_C(FRONT, LEFT, ACPI_PLD_GROUP(2, 1))"
                                                device ref tcss_usb3_port2 on end
                                        end
                                        chip drivers/usb/acpi
                                                register "desc" = ""USB3 Type-C Port C2 (MLB)""
                                                register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
                                                register "use_custom_pld" = "true"
                                                register "custom_pld" = "ACPI_PLD_TYPE_C(BACK, RIGHT, ACPI_PLD_GROUP(3, 1))"
                                                device ref tcss_usb3_port3 on end
                                        end
                                end
                        end
                end
                device ref xhci on
                        chip drivers/usb/acpi
                                device ref xhci_root_hub on
                                        chip drivers/usb/acpi
                                                register "desc" = ""USB2 Type-C Port C0 (MLB)""
                                                register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
                                                register "use_custom_pld" = "true"
                                                register "custom_pld" = "ACPI_PLD_TYPE_C(BACK, CENTER, ACPI_PLD_GROUP(1, 1))"
                                                device ref usb2_port1 on end
                                        end
                                        chip drivers/usb/acpi
                                                register "desc" = ""USB2 Type-C Port C1 (MLB)""
                                                register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
                                                register "use_custom_pld" = "true"
                                                register "custom_pld" = "ACPI_PLD_TYPE_C(FRONT, LEFT, ACPI_PLD_GROUP(2, 1))"
                                                device ref usb2_port2 on end
                                        end
                                        chip drivers/usb/acpi
                                                register "desc" = ""USB2 Type-C Port C2 (MLB)""
                                                register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
                                                register "use_custom_pld" = "true"
                                                register "custom_pld" = "ACPI_PLD_TYPE_C(BACK, RIGHT, ACPI_PLD_GROUP(3, 1))"
                                                device ref usb2_port3 on end
                                        end
                                        chip drivers/usb/acpi
                                                register "desc" = ""USB2 NFC""
                                                register "type" = "UPC_TYPE_INTERNAL"
                                                device ref usb2_port5 on end
                                        end
                                        chip drivers/usb/acpi
                                                register "desc" = ""USB2 Type-A Port A3 (MLB)""
                                                register "type" = "UPC_TYPE_A"
                                                register "use_custom_pld" = "true"
                                                register "custom_pld" = "ACPI_PLD_TYPE_A(BACK, CENTER, ACPI_PLD_GROUP(5, 1))"
                                                device ref usb2_port6 on end
                                        end
                                        chip drivers/usb/acpi
                                                register "desc" = ""USB2 Type-A Port A2 (MLB)""
                                                register "type" = "UPC_TYPE_A"
                                                register "use_custom_pld" = "true"
                                                register "custom_pld" = "ACPI_PLD_TYPE_A(BACK, LEFT, ACPI_PLD_GROUP(6, 1))"
                                                device ref usb2_port7 on end
                                        end
                                        chip drivers/usb/acpi
                                                register "desc" = ""USB2 Type-A Port A1 (MLB)""
                                                register "type" = "UPC_TYPE_A"
                                                register "use_custom_pld" = "true"
                                                register "custom_pld" = "ACPI_PLD_TYPE_A(FRONT, CENTER, ACPI_PLD_GROUP(4, 1))"
                                                device ref usb2_port8 on end
                                        end
                                        chip drivers/usb/acpi
                                                register "desc" = ""USB2 Type-A Port A0 (MLB)""
                                                register "type" = "UPC_TYPE_A"
                                                register "use_custom_pld" = "true"
                                                register "custom_pld" = "ACPI_PLD_TYPE_A(FRONT, RIGHT, ACPI_PLD_GROUP(1, 2))"
                                                device ref usb2_port9 on end
                                        end
                                        chip drivers/usb/acpi
                                                register "desc" = ""USB2 Bluetooth""
                                                register "type" = "UPC_TYPE_INTERNAL"
                                                register "reset_gpio" =
                                                        "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_D4)"
                                                device ref usb2_port10 on end
                                        end
                                        chip drivers/usb/acpi
                                                register "desc" = ""USB3 Type-A Port A0 (MLB)""
                                                register "type" = "UPC_TYPE_USB3_A"
                                                register "use_custom_pld" = "true"
                                                register "custom_pld" = "ACPI_PLD_TYPE_A(FRONT, RIGHT, ACPI_PLD_GROUP(1, 2))"
                                                device ref usb3_port1 on end
                                        end
                                        chip drivers/usb/acpi
                                                register "desc" = ""USB3 Type-A Port A1 (MLB)""
                                                register "type" = "UPC_TYPE_USB3_A"
                                                register "use_custom_pld" = "true"
                                                register "custom_pld" = "ACPI_PLD_TYPE_A(FRONT, CENTER, ACPI_PLD_GROUP(4, 1))"
                                                device ref usb3_port2 on end
                                        end
                                        chip drivers/usb/acpi
                                                register "desc" = ""USB3 Type-A Port A2 (MLB)""
                                                register "type" = "UPC_TYPE_USB3_A"
                                                register "use_custom_pld" = "true"
                                                register "custom_pld" = "ACPI_PLD_TYPE_A(BACK, LEFT, ACPI_PLD_GROUP(6, 1))"
                                                device ref usb3_port3 on end
                                        end
                                        chip drivers/usb/acpi
                                                register "desc" = ""USB3 Type-A Port A3 (MLB)""
                                                register "type" = "UPC_TYPE_USB3_A"
                                                register "use_custom_pld" = "true"
                                                register "custom_pld" = "ACPI_PLD_TYPE_A(BACK, CENTER, ACPI_PLD_GROUP(5, 1))"
                                                device ref usb3_port4 on end
                                        end
                                end
                        end
                end
        end
end