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cpu/x86/smm/pci_resource_store: Store DEV/VEN ID
[coreboot2.git] / src / mainboard / google / brya / variants / taeko4es / overridetree.cb
blob22b3ca7cae12dd1cad149e2680a6c4690b24dc1f
1 fw_config
2 field DB_USB 0 1
3 option DB_USB_ABSENT 0
4 option DB_USB3_NO_A 1
5 end
6 field DB_SD 2 3
7 option DB_SD_ABSENT 0
8 option DB_SD_OZ711LV2LN 1
9 end
10 field KB_BL 4
11 option KB_BL_ABSENT 0
12 option KB_BL_PRESENT 1
13 end
14 field AUDIO 5 7
15 option AUDIO_UNKNOWN 0
16 option AUDIO_MAX98357_ALC5682I_I2S 1
17 option AUDIO_MAX98357_ALC5682I_VS_I2S 2
18 end
19 field KB_LAYOUT 8 9
20 option KB_LAYOUT_DEFAULT 0
21 end
22 field WIFI_SAR_ID 10 11
23 option WIFI_SAR_ID_0 0
24 option WIFI_SAR_ID_1 1
25 option WIFI_SAR_ID_2 2
26 option WIFI_SAR_ID_3 3
27 end
28 field BOOT_NVME_MASK 12
29 option BOOT_NVME_DISABLED 0
30 option BOOT_NVME_ENABLED 1
31 end
32 field BOOT_EMMC_MASK 13
33 option BOOT_EMMC_DISABLED 0
34 option BOOT_EMMC_ENABLED 1
35 end
36 field HPS 17
37 option HPS_ABSENT 0
38 option HPS_PRESENT 1
39 end
40 end
41 chip soc/intel/alderlake
42 # Acoustic settings
43 register "acoustic_noise_mitigation" = "1"
44 register "slow_slew_rate[VR_DOMAIN_IA]" = "SLEW_FAST_8"
45 register "slow_slew_rate[VR_DOMAIN_GT]" = "SLEW_FAST_8"
46 register "fast_pkg_c_ramp_disable[VR_DOMAIN_IA]" = "1"
47 register "fast_pkg_c_ramp_disable[VR_DOMAIN_GT]" = "1"
48
49 register "ext_fivr_settings" = "{
50 .configure_ext_fivr = 1,
51 .v1p05_enable_bitmap = FIVR_ENABLE_ALL_SX,
52 .vnn_enable_bitmap = FIVR_ENABLE_ALL_SX,
53 .v1p05_supported_voltage_bitmap = FIVR_VOLTAGE_NORMAL |
54 FIVR_VOLTAGE_MIN_ACTIVE |
55 FIVR_VOLTAGE_MIN_RETENTION,
56 .vnn_supported_voltage_bitmap = FIVR_VOLTAGE_NORMAL |
57 FIVR_VOLTAGE_MIN_ACTIVE |
58 FIVR_VOLTAGE_MIN_RETENTION,
59 .v1p05_icc_max_ma = 500,
60 .vnn_sx_voltage_mv = 1250,
61 }"
62
63 register "tcss_aux_ori" = "1"
64 register "typec_aux_bias_pads[0]" = "{.pad_auxp_dc = GPP_E22, .pad_auxn_dc = GPP_E23}"
65 register "sagv" = "SaGv_Enabled"
66
67 register "usb2_ports[1]" = "USB2_PORT_EMPTY" # Disable Port 1
68 register "usb2_ports[2]" = "USB2_PORT_TYPE_C(OC2)" # DB USB2_C1
69 register "usb2_ports[3]" = "USB2_PORT_EMPTY" # Disable M.2 WWAN
70 register "usb3_ports[3]" = "USB3_PORT_EMPTY" # Disable M.2 WWAN
71
72 # Intel Common SoC Config
73 #+-------------------+---------------------------+
74 #| Field | Value |
75 #+-------------------+---------------------------+
76 #| GSPI1 | Fingerprint MCU |
77 #| I2C0 | Audio |
78 #| I2C1 | Touchscreen |
79 #| I2C2 | HPS |
80 #| I2C3 | cr50 TPM. Early init is |
81 #| | required to set up a BAR |
82 #| | for TPM communication |
83 #| I2C5 | Trackpad |
84 #+-------------------+---------------------------+
85 register "common_soc_config" = "{
86 .i2c[0] = {
87 .speed = I2C_SPEED_FAST,
88 },
89 .i2c[1] = {
90 .speed = I2C_SPEED_FAST,
91 },
92 .i2c[2] = {
93 .speed = I2C_SPEED_FAST,
94 },
95 .i2c[3] = {
96 .early_init = 1,
97 .speed = I2C_SPEED_FAST,
98 },
99 .i2c[5] = {
100 .rise_time_ns = 650,
101 .fall_time_ns = 400,
102 .data_hold_time_ns = 500,
103 .speed_config[0] = {
104 .speed = I2C_SPEED_FAST,
105 .scl_lcnt = 160,
106 .scl_hcnt = 70,
107 .sda_hold = 40,
108 }
109 },
110 }"
111 # I2C Port Config
112 register "serial_io_i2c_mode" = "{
113 [PchSerialIoIndexI2C0] = PchSerialIoPci,
114 [PchSerialIoIndexI2C1] = PchSerialIoPci,
115 [PchSerialIoIndexI2C2] = PchSerialIoPci,
116 [PchSerialIoIndexI2C3] = PchSerialIoPci,
117 [PchSerialIoIndexI2C4] = PchSerialIoDisabled,
118 [PchSerialIoIndexI2C5] = PchSerialIoPci,
119 }"
120 device domain 0 on
121 device ref igpu on
122 chip drivers/gfx/generic
123 register "device_count" = "3"
124 # DDIA for eDP
125 register "device[0].name" = ""LCD""
126 # Internal panel on the first port of the graphics chip
127 register "device[0].addr" = "0x80010400"
128 # DDIB is unused and HDMI is not enumerated in the kernel, so no GFX device is added for DDIB
129 # TCP0 (DP-1) for port C0
130 register "device[1].name" = ""DD01""
131 register "device[1].use_pld" = "true"
132 register "device[1].pld" = "ACPI_PLD_TYPE_C(LEFT, LEFT, ACPI_PLD_GROUP(1, 1))"
133 # TCP1 is unused and not enumerated in the kernel, so no GFX device is added for TCP1
134 # TCP2 (DP-2) for port C1
135 register "device[2].name" = ""DD02""
136 register "device[2].use_pld" = "true"
137 register "device[2].pld" = "ACPI_PLD_TYPE_C(RIGHT, RIGHT, ACPI_PLD_GROUP(2, 1))"
138 # TCP3 is unused and not enumerated in the kernel, so no GFX device is added for TCP3
139 device generic 0 on end
140 end
141 end # Integrated Graphics Device
142 device ref dtt on
143 chip drivers/intel/dptf
144 ## sensor information
145 register "options.tsr[0].desc" = ""DRAM_SOC""
146 register "options.tsr[1].desc" = ""Ambient""
147 register "options.tsr[2].desc" = ""Charger""
148 register "options.tsr[3].desc" = ""WWAN""
149
150 # TODO: below values are initial reference values only
151 ## Active Policy
152 register "policies.active" = "{
153 [0] = {
154 .target = DPTF_CPU,
155 .thresholds = {
156 TEMP_PCT(85, 90),
157 TEMP_PCT(80, 74),
158 TEMP_PCT(75, 74),
159 TEMP_PCT(70, 74),
160 TEMP_PCT(65, 74),
161 }
162 },
163 [1] = {
164 .target = DPTF_TEMP_SENSOR_1,
165 .thresholds = {
166 TEMP_PCT(50, 70),
167 TEMP_PCT(47, 58),
168 TEMP_PCT(45, 47),
169 TEMP_PCT(42, 45),
170 TEMP_PCT(39, 39),
171 }
172 },
173 [2] = {
174 .target = DPTF_TEMP_SENSOR_2,
175 .thresholds = {
176 TEMP_PCT(50, 70),
177 TEMP_PCT(47, 58),
178 TEMP_PCT(45, 47),
179 TEMP_PCT(42, 45),
180 TEMP_PCT(39, 39),
181 }
182 },
183 [3] = {
184 .target = DPTF_TEMP_SENSOR_3,
185 .thresholds = {
186 TEMP_PCT(50, 70),
187 TEMP_PCT(47, 58),
188 TEMP_PCT(45, 47),
189 TEMP_PCT(42, 45),
190 TEMP_PCT(39, 39),
191 }
192 }
193 }"
194
195 ## Passive Policy
196 register "policies.passive" = "{
197 [0] = DPTF_PASSIVE(CPU, CPU, 95, 5000),
198 [1] = DPTF_PASSIVE(CPU, TEMP_SENSOR_0, 90, 6000),
199 [2] = DPTF_PASSIVE(CPU, TEMP_SENSOR_1, 90, 6000),
200 [3] = DPTF_PASSIVE(CHARGER, TEMP_SENSOR_2, 90, 6000),
201 [4] = DPTF_PASSIVE(CPU, TEMP_SENSOR_3, 90, 6000),
202 }"
203
204 ## Critical Policy
205 register "policies.critical" = "{
206 [0] = DPTF_CRITICAL(CPU, 105, SHUTDOWN),
207 [1] = DPTF_CRITICAL(TEMP_SENSOR_0, 100, SHUTDOWN),
208 [2] = DPTF_CRITICAL(TEMP_SENSOR_1, 100, SHUTDOWN),
209 [3] = DPTF_CRITICAL(TEMP_SENSOR_2, 100, SHUTDOWN),
210 [4] = DPTF_CRITICAL(TEMP_SENSOR_3, 100, SHUTDOWN),
211 }"
212
213 register "controls.power_limits" = "{
214 .pl1 = {
215 .min_power = 3000,
216 .max_power = 15000,
217 .time_window_min = 28 * MSECS_PER_SEC,
218 .time_window_max = 32 * MSECS_PER_SEC,
219 .granularity = 200,
220 },
221 .pl2 = {
222 .min_power = 55000,
223 .max_power = 55000,
224 .time_window_min = 28 * MSECS_PER_SEC,
225 .time_window_max = 32 * MSECS_PER_SEC,
226 .granularity = 1000,
227 }
228 }"
229
230 ## Charger Performance Control (Control, mA)
231 register "controls.charger_perf" = "{
232 [0] = { 255, 1700 },
233 [1] = { 24, 1500 },
234 [2] = { 16, 1000 },
235 [3] = { 8, 500 }
236 }"
237
238 ## Fan Performance Control (Percent, Speed, Noise, Power)
239 register "controls.fan_perf" = "{
240 [0] = { 100, 6000, 220, 2200, },
241 [1] = { 92, 5500, 180, 1800, },
242 [2] = { 85, 5000, 145, 1450, },
243 [3] = { 70, 4400, 115, 1150, },
244 [4] = { 56, 3900, 90, 900, },
245 [5] = { 45, 3300, 55, 550, },
246 [6] = { 38, 3000, 30, 300, },
247 [7] = { 33, 2900, 15, 150, },
248 [8] = { 10, 800, 10, 100, },
249 [9] = { 0, 0, 0, 50, }
250 }"
251
252 ## Fan options
253 register "options.fan.fine_grained_control" = "1"
254 register "options.fan.step_size" = "2"
255
256 device generic 0 alias dptf_policy on end
257 end
258 end
259 device ref pcie4_0 on
260 # Enable CPU PCIE RP 1 using CLK 0
261 register "cpu_pcie_rp[CPU_RP(1)]" = "{
262 .clk_req = 0,
263 .clk_src = 0,
264 .flags = PCIE_RP_LTR | PCIE_RP_AER,
265 }"
266 end
267 device ref tbt_pcie_rp0 off end
268 device ref tbt_pcie_rp1 off end
269 device ref tbt_pcie_rp2 off end
270 device ref i2c0 on
271 chip drivers/i2c/generic
272 register "hid" = ""10EC5682""
273 register "name" = ""RT58""
274 register "desc" = ""Headset Codec""
275 register "irq_gpio" = "ACPI_GPIO_IRQ_EDGE_BOTH(GPP_A23)"
276 # Set the jd_src to RT5668_JD1 for jack detection
277 register "property_count" = "1"
278 register "property_list[0].type" = "ACPI_DP_TYPE_INTEGER"
279 register "property_list[0].name" = ""realtek,jd-src""
280 register "property_list[0].integer" = "1"
281 device i2c 1a on
282 probe AUDIO AUDIO_MAX98357_ALC5682I_I2S
283 end
284 end
285 chip drivers/i2c/generic
286 register "hid" = ""RTL5682""
287 register "name" = ""RT58""
288 register "desc" = ""Headset Codec""
289 register "irq_gpio" = "ACPI_GPIO_IRQ_EDGE_BOTH(GPP_A23)"
290 # Set the jd_src to RT5668_JD1 for jack detection
291 register "property_count" = "1"
292 register "property_list[0].type" = "ACPI_DP_TYPE_INTEGER"
293 register "property_list[0].name" = ""realtek,jd-src""
294 register "property_list[0].integer" = "1"
295 device i2c 1a on
296 probe AUDIO AUDIO_MAX98357_ALC5682I_VS_I2S
297 end
298 end
299 end
300 device ref i2c1 on
301 chip drivers/i2c/hid
302 register "generic.hid" = ""GDIX0000""
303 register "generic.desc" = ""Goodix Touchscreen""
304 register "generic.irq" = "ACPI_IRQ_LEVEL_LOW(GPP_C7_IRQ)"
305 register "generic.detect" = "1"
306 register "generic.reset_gpio" =
307 "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C1)"
308 # Parameter T5 >= 180ms
309 register "generic.reset_delay_ms" = "180"
310 # Parameter T2 >= 1ms
311 register "generic.reset_off_delay_ms" = "3"
312 register "generic.enable_gpio" =
313 "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_C0)"
314 # Parameter T1 >= 20ms
315 register "generic.enable_delay_ms" = "20"
316 register "generic.stop_gpio" =
317 "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_E3)"
318 # Parameter T4 >= 1ms
319 register "generic.stop_off_delay_ms" = "1"
320 register "generic.has_power_resource" = "1"
321 register "hid_desc_reg_offset" = "0x01"
322 device i2c 5d on end
323 end
324 chip drivers/i2c/generic
325 register "hid" = ""ELAN0001""
326 register "desc" = ""ELAN Touchscreen""
327 register "irq" = "ACPI_IRQ_LEVEL_LOW(GPP_C7_IRQ)"
328 register "detect" = "1"
329 register "reset_gpio" =
330 "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C1)"
331 register "reset_delay_ms" = "20"
332 register "enable_gpio" =
333 "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_C0)"
334 register "enable_delay_ms" = "1"
335 register "has_power_resource" = "1"
336 device i2c 10 on end
337 end
338 end
339 device ref i2c2 on
340 chip drivers/i2c/generic
341 register "hid" = ""GOOG0020""
342 register "desc" = ""ChromeOS HPS""
343 register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_E7)" # EN_HPS_PWR
344 register "irq" = "ACPI_IRQ_LEVEL_LOW(GPP_E3_IRQ)" # HPS_INT_ODL
345 # HPS uses I2C addresses 0x30 and 0x51.
346 # The address we provide here is not significant because
347 # neither coreboot nor Linux have a driver for HPS,
348 # it's only used from userspace.
349 device i2c 30 on
350 probe HPS HPS_PRESENT
351 end
352 end
353 end
354 device ref i2c3 on
355 chip drivers/i2c/tpm
356 register "hid" = ""GOOG0005""
357 register "irq" = "ACPI_IRQ_EDGE_LOW(GPP_A13_IRQ)"
358 device i2c 50 on end
359 end
360 end
361 device ref i2c5 on
362 chip drivers/i2c/generic
363 register "hid" = ""ELAN0000""
364 register "desc" = ""ELAN Touchpad""
365 register "irq" = "ACPI_IRQ_WAKE_LEVEL_LOW(GPP_F14_IRQ)"
366 register "wake" = "GPE0_DW2_14"
367 register "detect" = "1"
368 device i2c 15 on end
369 end
370 chip drivers/i2c/hid
371 register "generic.hid" = ""SYNA0000""
372 register "generic.cid" = ""ACPI0C50""
373 register "generic.desc" = ""Synaptics Touchpad""
374 register "generic.irq" = "ACPI_IRQ_WAKE_LEVEL_LOW(GPP_F14_IRQ)"
375 register "generic.wake" = "GPE0_DW2_14"
376 register "generic.detect" = "1"
377 register "hid_desc_reg_offset" = "0x20"
378 device i2c 2c on end
379 end
380 end
381 device ref hda on
382 chip drivers/generic/max98357a
383 register "hid" = ""MX98357A""
384 register "sdmode_gpio" =
385 "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_A11)"
386 register "sdmode_delay" = "5"
387 device generic 0 on
388 probe AUDIO AUDIO_MAX98357_ALC5682I_I2S
389 probe AUDIO AUDIO_MAX98357_ALC5682I_VS_I2S
390 end
391 end
392 chip drivers/sof
393 register "spkr_tplg" = "max98357a"
394 register "jack_tplg" = "rt5682"
395 register "mic_tplg" = "_2ch_pdm0"
396 device generic 0 on end
397 end
398 end
399 device ref pcie_rp5 on
400 chip soc/intel/common/block/pcie/rtd3
401 register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_B11)"
402 register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_H20)"
403 register "srcclk_pin" = "2"
404 device generic 0 on end
405 end
406 register "pch_pcie_rp[PCH_RP(5)]" = "{
407 .clk_src = 2,
408 .clk_req = 2,
409 .flags = PCIE_RP_LTR | PCIE_RP_AER,
410 }"
411 end
412 device ref pcie_rp6 off end
413 device ref pcie_rp8 on
414 chip soc/intel/common/block/pcie/rtd3
415 register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_H13)"
416 register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_D18)"
417 register "srcclk_pin" = "3"
418 device generic 0 on
419 probe DB_SD DB_SD_OZ711LV2LN
420 end
421 end
422 end
423 device ref pcie_rp9 on
424 chip soc/intel/common/block/pcie/rtd3
425 register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_D11)"
426 register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_B4)"
427 register "srcclk_pin" = "1"
428 device generic 0 on end
429 end
430 end
431 device ref gspi1 on
432 chip drivers/spi/acpi
433 register "name" = ""CRFP""
434 register "hid" = "ACPI_DT_NAMESPACE_HID"
435 register "uid" = "1"
436 register "compat_string" = ""google,cros-ec-spi""
437 register "irq" = "ACPI_IRQ_WAKE_LEVEL_LOW(GPP_F15_IRQ)"
438 register "wake" = "GPE0_DW2_15"
439 register "has_power_resource" = "1"
440 register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_D1)"
441 register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_D2)"
442 register "enable_delay_ms" = "3"
443 device spi 0 hidden end
444 end # FPMCU
445 end
446 device ref pch_espi on
447 chip ec/google/chromeec
448 use conn0 as mux_conn[0]
449 use conn1 as mux_conn[1]
450 device pnp 0c09.0 on end
451 end
452 end
453 device ref pmc hidden
454 chip drivers/intel/pmc_mux
455 device generic 0 on
456 chip drivers/intel/pmc_mux/conn
457 use usb2_port1 as usb2_port
458 use tcss_usb3_port1 as usb3_port
459 device generic 0 alias conn0 on end
460 end
461 chip drivers/intel/pmc_mux/conn
462 use usb2_port3 as usb2_port
463 use tcss_usb3_port3 as usb3_port
464 device generic 2 alias conn1 on end
465 end
466 end
467 end
468 end
469 device ref tcss_xhci on
470 chip drivers/usb/acpi
471 device ref tcss_root_hub on
472 chip drivers/usb/acpi
473 register "desc" = ""USB3 Type-C Port C0 (MLB)""
474 register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
475 register "use_custom_pld" = "true"
476 register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, LEFT, ACPI_PLD_GROUP(1, 1))"
477 device ref tcss_usb3_port1 on end
478 end
479 chip drivers/usb/acpi
480 register "desc" = ""USB3 Type-C Port C1 (DB)""
481 register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
482 register "use_custom_pld" = "true"
483 register "custom_pld" = "ACPI_PLD_TYPE_C(RIGHT, RIGHT, ACPI_PLD_GROUP(2, 1))"
484 device ref tcss_usb3_port3 on
485 probe DB_USB DB_USB3_NO_A
486 end
487 end
488 end
489 end
490 end
491 device ref xhci on
492 chip drivers/usb/acpi
493 device ref xhci_root_hub on
494 chip drivers/usb/acpi
495 register "desc" = ""USB2 Type-C Port C0 (MLB)""
496 register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
497 register "use_custom_pld" = "true"
498 register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, LEFT, ACPI_PLD_GROUP(1, 1))"
499 device ref usb2_port1 on end
500 end
501 chip drivers/usb/acpi
502 register "desc" = ""USB2 Type-C Port C1 (DB)""
503 register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
504 register "use_custom_pld" = "true"
505 register "custom_pld" = "ACPI_PLD_TYPE_C(RIGHT, RIGHT, ACPI_PLD_GROUP(2, 1))"
506 device ref usb2_port3 on
507 probe DB_USB DB_USB3_NO_A
508 end
509 end
510 chip drivers/usb/acpi
511 register "desc" = ""USB2 Camera""
512 register "type" = "UPC_TYPE_INTERNAL"
513 device ref usb2_port6 on
514 end
515 end
516 chip drivers/usb/acpi
517 register "desc" = ""USB2 Type-A Port (MLB)""
518 register "type" = "UPC_TYPE_A"
519 register "use_custom_pld" = "true"
520 register "custom_pld" = "ACPI_PLD_TYPE_A(LEFT, RIGHT, ACPI_PLD_GROUP(3, 1))"
521 device ref usb2_port9 on end
522 end
523 chip drivers/usb/acpi
524 register "desc" = ""USB2 Bluetooth""
525 register "type" = "UPC_TYPE_INTERNAL"
526 register "reset_gpio" =
527 "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_D4)"
528 device ref usb2_port10 on end
529 end
530 chip drivers/usb/acpi
531 register "desc" = ""USB3 Type-A Port (MLB)""
532 register "type" = "UPC_TYPE_USB3_A"
533 register "use_custom_pld" = "true"
534 register "custom_pld" = "ACPI_PLD_TYPE_A(LEFT, RIGHT, ACPI_PLD_GROUP(3, 1))"
535 device ref usb3_port1 on end
536 end
537 end
538 end
539 end
540 end
541 end
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