cpu/x86/smm/pci_resource_store: Store DEV/VEN ID
[coreboot2.git] / src / mainboard / google / dedede / variants / beadrix / gpio.c
blob131cb96ad6f4ac3606244943235fa27956f2bb7d
1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 #include <baseboard/gpio.h>
4 #include <baseboard/variants.h>
5 #include <bootstate.h>
6 #include <fw_config.h>
8 /* Pad configuration in ramstage */
9 static const struct pad_config gpio_table[] = {
10 /* A10 : WWAN_EN */
11 PAD_CFG_GPO(GPP_A10, 1, PWROK),
12 /* A11 : TOUCH_RPT_EN ==> NC */
13 PAD_NC(GPP_A11, NONE),
14 /* A18 : USB_OC0_N */
15 PAD_CFG_NF(GPP_A18, NONE, DEEP, NF1),
17 /* B7 : PCIE_CLKREQ2_N ==> WWAN_SAR_DETECT_ODL */
18 PAD_CFG_GPO(GPP_B7, 1, DEEP),
20 /* C18 : AP_I2C_EMR_SDA ==> NC */
21 PAD_NC(GPP_C18, NONE),
22 /* C19 : AP_I2C_EMR_SCL ==> NC */
23 PAD_NC(GPP_C19, NONE),
24 /* C22 : UART2_RTS_N ==> NC */
25 PAD_NC(GPP_C22, NONE),
26 /* C23 : UART2_CTS_N ==> NC */
27 PAD_NC(GPP_C23, NONE),
29 /* D0 : WWAN_HOST_WAKE ==> WWAN_WDISABLE_L */
30 PAD_CFG_GPO(GPP_D0, 1, DEEP),
31 /* D5 : TOUCH_RESET_L */
32 PAD_NC(GPP_D5, NONE),
33 /* D6 : EN_PP3300_TOUCH_S0 */
34 PAD_NC(GPP_D6, NONE),
35 /* D12 : WCAM_RST_L ==> NC */
36 PAD_NC(GPP_D12, NONE),
37 /* D13 : EN_PP2800_CAMERA */
38 PAD_CFG_GPO(GPP_D13, 1, PLTRST),
39 /* D14 : EN_PP1200_CAMERA ==> NC */
40 PAD_NC(GPP_D14, NONE),
41 /* D15 : UCAM_RST_L ==> NC */
42 PAD_NC(GPP_D15, NONE),
43 /* D19 : WWAN_WLAN_COEX1 ==> TP */
44 PAD_NC(GPP_D19, NONE),
45 /* D20 : WWAN_WLAN_COEX2 ==> TP */
46 PAD_NC(GPP_D20, NONE),
47 /* D21 : WWAN_WLAN_COEX3 ==> TP */
48 PAD_NC(GPP_D21, NONE),
49 /* D22 : AP_I2C_SUB_SDA*/
50 PAD_CFG_NF(GPP_D22, NONE, DEEP, NF1),
51 /* D23 : AP_I2C_SUB_SCL */
52 PAD_CFG_NF(GPP_D23, NONE, DEEP, NF1),
54 /* E1 : EMR_RESET_L ==> NC */
55 PAD_NC(GPP_E1, NONE),
56 /* E2 : CLK_24M_WCAM ==> NC */
57 PAD_NC(GPP_E2, NONE),
58 /* E5 : AP_SUB_IO_2 ==> TP */
59 PAD_NC(GPP_E5, NONE),
60 /* E10 : GPP_E10/SML_DATA0 ==> NC */
61 PAD_NC(GPP_E10, NONE),
62 /* E11 : AP_I2C_SUB_INT_ODL */
63 PAD_CFG_GPI_APIC(GPP_E11, NONE, PLTRST, LEVEL, NONE),
65 /* G0 : SD_CMD ==> NC */
66 PAD_NC(GPP_G0, NONE),
67 /* G1 : SD_DATA0 ==> NC */
68 PAD_NC(GPP_G1, NONE),
69 /* G2 : SD_DATA1 ==> NC */
70 PAD_NC(GPP_G2, NONE),
71 /* G3 : SD_DATA2 ==> NC */
72 PAD_NC(GPP_G3, NONE),
73 /* G4 : SD_DATA3 ==> NC */
74 PAD_NC(GPP_G4, NONE),
75 /* G5 : SD_CD_ODL ==> NC */
76 PAD_NC(GPP_G5, NONE),
77 /* G6 : SD_CLK ==> NC */
78 PAD_NC(GPP_G6, NONE),
79 /* G7 : SD_SDIO_WP ==> NC */
80 PAD_NC(GPP_G7, NONE),
82 /* H1 : EN_PP3300_SD_U ==> NC */
83 PAD_NC(GPP_H1, NONE),
84 /* H6 : AP_I2C_CAM_SDA ==> NC */
85 PAD_NC(GPP_H6, NONE),
86 /* H7 : AP_I2C_CAM_SCL ==> NC */
87 PAD_NC(GPP_H7, NONE),
88 /* H17 : WWAN_RST_L */
89 PAD_CFG_GPO(GPP_H17, 0, PLTRST),
91 /* S2 : DMIC1_CLK ==> NC */
92 PAD_NC(GPP_S2, NONE),
93 /* S3 : DMIC1_DATA ==> NC */
94 PAD_NC(GPP_S3, NONE),
97 static const struct pad_config lte_disable_pads[] = {
98 PAD_NC(GPP_A10, NONE),
99 PAD_NC(GPP_D0, NONE),
100 PAD_NC(GPP_H17, NONE),
103 const struct pad_config *variant_override_gpio_table(size_t *num)
105 *num = ARRAY_SIZE(gpio_table);
106 return gpio_table;
109 static const struct pad_config romstage_gpio_table[] = {
110 /* no touchscreen present */
111 /* D5 : TOUCH_RESET_L */
112 PAD_NC(GPP_D5, NONE),
113 /* D6 : EN_PP3300_TOUCH_S0 */
114 PAD_NC(GPP_D6, NONE),
117 const struct pad_config *__weak variant_romstage_gpio_table(size_t *num)
119 *num = ARRAY_SIZE(romstage_gpio_table);
120 return romstage_gpio_table;
123 static void fw_config_handle(void *unused)
125 if (!fw_config_probe(FW_CONFIG(DB_PORTS, DB_PORTS_1C_LTE)))
126 gpio_configure_pads(lte_disable_pads, ARRAY_SIZE(lte_disable_pads));
128 BOOT_STATE_INIT_ENTRY(BS_DEV_ENABLE, BS_ON_ENTRY, fw_config_handle, NULL);