1 # SPDX
-License
-Identifier
: GPL
-2.0-or-later
3 chip northbridge
/intel
/x4x # Northbridge
4 device cpu_cluster
0 on ops x4x_cpu_bus_ops
end # APIC cluster
6 ops x4x_pci_domain_ops # PCI domain
7 subsystemid
0x8086 0x0028 inherit
8 device pci
0.0 on
end # Host Bridge
9 device pci
2.0 on
end # Integrated graphics controller
10 device pci
2.1 on
end # Integrated graphics controller
2
11 device pci
3.0 off
end #
ME
12 device pci
3.1 off
end #
ME
13 chip southbridge
/intel
/i82801jx # Southbridge
14 register
"gpe0_en" = "0x40"
17 register
"sata_port_map" = "0x1f"
18 register
"sata_clock_request" = "0"
20 # Enable PCIe ports
0,2,3 as slots.
21 register
"pcie_slot_implemented" = "0xb"
23 register
"gen1_dec" = "0x00fc0601"
24 register
"gen2_dec" = "0x00fc0291"
26 device pci
19.0 on
end # GBE
27 device pci
1a
.0 on
end # USB
28 device pci
1a
.1 on
end # USB
29 device pci
1a
.2 on
end # USB
30 device pci
1a
.7 on
end # USB
31 device pci
1b
.0 on
end # Audio
32 device pci
1c
.0 on
end # PCIe
1
33 device pci
1c
.1 off
end # PCIe
2
34 device pci
1c
.2 on
end # PCIe
3
35 device pci
1c
.3 on
end # PCIe
4
36 device pci
1c
.4 off
end # PCIe
5
37 device pci
1c
.5 off
end # PCIe
6
38 device pci
1d
.0 on
end # USB
39 device pci
1d
.1 on
end # USB
40 device pci
1d
.2 on
end # USB
41 device pci
1d
.7 on
end # USB
42 device pci
1e
.0 on
end # PCI bridge
43 device pci
1f
.0 on # LPC bridge
44 chip superio
/winbond
/w83627dhg # Super I
/O
45 device pnp
2e
.0 on # Floppy
51 device pnp
2e
.1 on # Parallel port
56 device pnp
2e
.2 on # COM
1
60 device pnp
2e
.3 off
end # COM
2
61 device pnp
2e
.5 on # Keyboard
67 device pnp
2e
.6 off
end # SPI
68 device pnp
2e
.7 on
end # GPIO
6
69 device pnp
2e
.8 off
end # WDTO# PLED
70 device pnp
2e
.9 off
end # GPIO
2
71 device pnp
2e
.109 on # GPIO
3
74 device pnp
2e
.209 off
end # GPIO
4
75 device pnp
2e
.309 on # GPIO
5
79 device pnp
2e.a on # ACPI
80 irq
0xe4 = 0x30 # power dram during S3
82 device pnp
2e.b on # Hardware monitor
85 device pnp
2e.c off
end # PECI
, SST
88 device pci
1f
.1 on
end # PATA
/IDE
89 device pci
1f
.2 on
end # SATA
90 device pci
1f
.3 on # SMBus
91 chip drivers
/i2c
/ck505 # SLG8XP549T
92 register
"mask" = "{ 0xff, 0xff, 0xff, 0xff,
93 0xff, 0xff, 0xff, 0xff,
94 0xff, 0xff, 0xff, 0xff, 0xff }"
95 register
"regs" = "{ 0x11, 0xd9, 0xff, 0xfd,
96 0xff, 0x00, 0x00, 0x06,
97 0x10, 0x05, 0x01, 0x80, 0x0d }"
101 device pci
1f
.4 off
end
102 device pci
1f
.5 on
end # IDE
103 device pci
1f
.6 off
end