cpu/x86/smm/pci_resource_store: Store DEV/VEN ID
[coreboot2.git] / src / mainboard / intel / mtlrvp / chromeos.c
blobbb6df26c45692b6fc37a1c1ae3f42092806b346b
1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 #include <baseboard/gpio.h>
4 #include <bootmode.h>
5 #include <boot/coreboot_tables.h>
6 #include <gpio.h>
7 #include <types.h>
9 void fill_lb_gpios(struct lb_gpios *gpios)
11 struct lb_gpio chromeos_gpios[] = {
12 {-1, ACTIVE_HIGH, get_lid_switch(), "lid"},
13 {-1, ACTIVE_HIGH, 0, "power"},
14 {-1, ACTIVE_HIGH, gfx_get_init_done(), "oprom"},
15 {-1, ACTIVE_HIGH, 0, "EC in RW"},
17 lb_add_gpios(gpios, chromeos_gpios, ARRAY_SIZE(chromeos_gpios));
20 #if !CONFIG(EC_GOOGLE_CHROMEEC_SWITCHES)
21 int get_lid_switch(void)
23 /* Lid always open */
24 return 1;
27 int get_recovery_mode_switch(void)
29 return 0;
31 #endif /*!CONFIG(EC_GOOGLE_CHROMEEC_SWITCHES) */
33 int get_write_protect_state(void)
35 /* No write protect */
36 return 0;