1 /* SPDX-License-Identifier: GPL-2.0-only */
3 /* This is board specific information: IRQ routing for the
4 * 0:1e.0 PCI bridge of the ICH9
7 /* TODO: which slots are actually relevant? */
10 // PCI Slot 1 routes ABCD
11 Package() { 0x0000ffff, 0, 0, 16},
12 Package() { 0x0000ffff, 1, 0, 17},
13 Package() { 0x0000ffff, 2, 0, 18},
14 Package() { 0x0000ffff, 3, 0, 19},
16 // PCI Slot 2 routes BCDA
17 Package() { 0x0001ffff, 0, 0, 17},
18 Package() { 0x0001ffff, 1, 0, 18},
19 Package() { 0x0001ffff, 2, 0, 19},
20 Package() { 0x0001ffff, 3, 0, 16},
22 // PCI Slot 3 routes CDAB
23 Package() { 0x0002ffff, 0, 0, 18},
24 Package() { 0x0002ffff, 1, 0, 19},
25 Package() { 0x0002ffff, 2, 0, 16},
26 Package() { 0x0002ffff, 3, 0, 17},
28 // PCI Slot 4 routes ABCD
29 Package() { 0x0003ffff, 0, 0, 16},
30 Package() { 0x0003ffff, 1, 0, 17},
31 Package() { 0x0003ffff, 2, 0, 18},
32 Package() { 0x0003ffff, 3, 0, 19},
34 // PCI Slot 5 routes ABCD
35 Package() { 0x0004ffff, 0, 0, 16},
36 Package() { 0x0004ffff, 1, 0, 17},
37 Package() { 0x0004ffff, 2, 0, 18},
38 Package() { 0x0004ffff, 3, 0, 19},
40 // PCI Slot 6 routes BCDA
41 Package() { 0x0005ffff, 0, 0, 17},
42 Package() { 0x0005ffff, 1, 0, 18},
43 Package() { 0x0005ffff, 2, 0, 19},
44 Package() { 0x0005ffff, 3, 0, 16},
46 // FIXME: what's this supposed to mean? (adopted from ich7)
47 //Package() { 0x0008ffff, 0, 0, 20},
51 // PCI Slot 1 routes ABCD
52 Package() { 0x0000ffff, 0, \_SB.PCI0.LPCB.LNKA, 0},
53 Package() { 0x0000ffff, 1, \_SB.PCI0.LPCB.LNKB, 0},
54 Package() { 0x0000ffff, 2, \_SB.PCI0.LPCB.LNKC, 0},
55 Package() { 0x0000ffff, 3, \_SB.PCI0.LPCB.LNKD, 0},
57 // PCI Slot 2 routes BCDA
58 Package() { 0x0001ffff, 0, \_SB.PCI0.LPCB.LNKB, 0},
59 Package() { 0x0001ffff, 1, \_SB.PCI0.LPCB.LNKC, 0},
60 Package() { 0x0001ffff, 2, \_SB.PCI0.LPCB.LNKD, 0},
61 Package() { 0x0001ffff, 3, \_SB.PCI0.LPCB.LNKA, 0},
63 // PCI Slot 3 routes CDAB
64 Package() { 0x0002ffff, 0, \_SB.PCI0.LPCB.LNKC, 0},
65 Package() { 0x0002ffff, 1, \_SB.PCI0.LPCB.LNKD, 0},
66 Package() { 0x0002ffff, 2, \_SB.PCI0.LPCB.LNKA, 0},
67 Package() { 0x0002ffff, 3, \_SB.PCI0.LPCB.LNKB, 0},
69 // PCI Slot 4 routes ABCD
70 Package() { 0x0003ffff, 0, \_SB.PCI0.LPCB.LNKA, 0},
71 Package() { 0x0003ffff, 1, \_SB.PCI0.LPCB.LNKB, 0},
72 Package() { 0x0003ffff, 2, \_SB.PCI0.LPCB.LNKC, 0},
73 Package() { 0x0003ffff, 3, \_SB.PCI0.LPCB.LNKD, 0},
75 // PCI Slot 5 routes ABCD
76 Package() { 0x0004ffff, 0, \_SB.PCI0.LPCB.LNKA, 0},
77 Package() { 0x0004ffff, 1, \_SB.PCI0.LPCB.LNKB, 0},
78 Package() { 0x0004ffff, 2, \_SB.PCI0.LPCB.LNKC, 0},
79 Package() { 0x0004ffff, 3, \_SB.PCI0.LPCB.LNKD, 0},
81 // PCI Slot 6 routes BCDA
82 Package() { 0x0005ffff, 0, \_SB.PCI0.LPCB.LNKB, 0},
83 Package() { 0x0005ffff, 1, \_SB.PCI0.LPCB.LNKC, 0},
84 Package() { 0x0005ffff, 2, \_SB.PCI0.LPCB.LNKD, 0},
85 Package() { 0x0005ffff, 3, \_SB.PCI0.LPCB.LNKA, 0},
88 // Package() { 0x0008ffff, 0, \_SB.PCI0.LPCB.LNKE, 0},