cpu/x86/smm/pci_resource_store: Store DEV/VEN ID
[coreboot2.git] / src / superio / nuvoton / nct5572d / superio.c
blob34fa016ac88b15e97b4e2298cea0a0d2a4873c31
1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 #include <console/console.h>
4 #include <device/device.h>
5 #include <device/pnp.h>
6 #include <pc80/keyboard.h>
7 #include <option.h>
8 #include <superio/conf_mode.h>
10 #include "nct5572d.h"
12 #define MAINBOARD_POWER_OFF 0
13 #define MAINBOARD_POWER_ON 1
14 #define MAINBOARD_POWER_KEEP 2
16 static void nct5572d_init(struct device *dev)
18 uint8_t byte;
19 uint8_t power_status;
20 uint8_t mouse_detected;
22 if (!dev->enabled)
23 return;
25 switch (dev->path.pnp.device) {
26 /* TODO: Might potentially need code for HWM or FDC etc. */
27 case NCT5572D_KBC:
28 /* Enable mouse controller */
29 pnp_enter_conf_mode(dev);
30 byte = pnp_read_config(dev, 0x2a);
31 byte &= ~(0x1 << 1);
32 pnp_write_config(dev, 0x2a, byte);
33 pnp_exit_conf_mode(dev);
35 mouse_detected = pc_keyboard_init(PROBE_AUX_DEVICE);
37 if (!mouse_detected) {
38 printk(BIOS_INFO, "%s: Disable mouse controller.\n",
39 __func__);
40 pnp_enter_conf_mode(dev);
41 byte = pnp_read_config(dev, 0x2a);
42 byte |= 0x1 << 1;
43 pnp_write_config(dev, 0x2a, byte);
44 pnp_exit_conf_mode(dev);
46 break;
47 case NCT5572D_ACPI:
48 /* Set power state after power fail */
49 power_status = get_uint_option("power_on_after_fail",
50 CONFIG_MAINBOARD_POWER_FAILURE_STATE);
51 pnp_enter_conf_mode(dev);
52 pnp_set_logical_device(dev);
53 byte = pnp_read_config(dev, 0xe4);
54 byte &= ~0x60;
55 if (power_status == MAINBOARD_POWER_ON)
56 byte |= (0x1 << 5);
57 else if (power_status == MAINBOARD_POWER_KEEP)
58 byte |= (0x2 << 5);
59 pnp_write_config(dev, 0xe4, byte);
60 pnp_exit_conf_mode(dev);
61 printk(BIOS_INFO, "set power %s after power fail\n", power_status ? "on" : "off");
62 break;
66 static struct device_operations ops = {
67 .read_resources = pnp_read_resources,
68 .set_resources = pnp_set_resources,
69 .enable_resources = pnp_enable_resources,
70 .enable = pnp_alt_enable,
71 .init = nct5572d_init,
72 .ops_pnp_mode = &pnp_conf_mode_8787_aa,
75 static struct pnp_info pnp_dev_info[] = {
76 { NULL, NCT5572D_FDC}, /* no pins, removed from datasheet */
77 { NULL, NCT5572D_PP}, /* no pins, removed from datasheet */
78 { NULL, NCT5572D_SP1, PNP_IO0 | PNP_IRQ0, 0x0FF8, },
79 { NULL, NCT5572D_IR, PNP_IO0 | PNP_IRQ0, 0x0FF8, },
80 { NULL, NCT5572D_KBC, PNP_IO0 | PNP_IO1 | PNP_IRQ0 | PNP_IRQ1,
81 0x0FFF, 0x0FFF, },
82 { NULL, NCT5572D_CIR, PNP_IO0 | PNP_IRQ0, 0x0FF8, },
83 { NULL, NCT5572D_WDT1},
84 { NULL, NCT5572D_ACPI},
85 { NULL, NCT5572D_HWM_TSI_FPLED, PNP_IO0 | PNP_IO1 | PNP_IRQ0,
86 0x0FFE, 0x0FFE, },
87 { NULL, NCT5572D_PECI},
88 { NULL, NCT5572D_SUSLED},
89 { NULL, NCT5572D_CIRWKUP, PNP_IO0 | PNP_IRQ0, 0x0FF8, },
90 { NULL, NCT5572D_GPIO_PP_OD},
91 { NULL, NCT5572D_GPIO2},
92 { NULL, NCT5572D_GPIO3},
93 { NULL, NCT5572D_GPIO4}, /* no pins, removed from datasheet */
94 { NULL, NCT5572D_GPIO5},
95 { NULL, NCT5572D_GPIO6},
96 { NULL, NCT5572D_GPIO7}, /* no pins, removed from datasheet */
97 { NULL, NCT5572D_GPIO8},
98 { NULL, NCT5572D_GPIO9},
101 static void enable_dev(struct device *dev)
103 pnp_enable_devices(dev, &ops, ARRAY_SIZE(pnp_dev_info), pnp_dev_info);
106 struct chip_operations superio_nuvoton_nct5572d_ops = {
107 .name = "NUVOTON NCT5572D Super I/O",
108 .enable_dev = enable_dev,