Documentation/external_docs.md

   1 # External Resources
   2
   3 This is a list of resources that could be useful to coreboot developers.
   4 These are not endorsed or officially recommended by the coreboot project,
   5 but simply listed here in the hopes that someone will find something
   6 useful.
   7
   8 Please add any helpful or informational links and sections as you see fit.
   9
  10 ## Articles
  11
  12 * External Interrupts in the x86 system.
  13   * [Part 1: Interrupt controller evolution](https://habr.com/en/post/446312/)
  14   * [Part 2: Linux kernel boot options](https://habr.com/en/post/501660/)
  15   * [Part 3: Interrupt routing setup in a chipset](https://habr.com/en/post/501912/)
  16 * System address map initialization in x86/x64 architecture.
  17   * [Part 1: PCI-based systems](https://resources.infosecinstitute.com/topic/system-address-map-initialization-in-x86x64-architecture-part-1-pci-based-systems/)
  18   * [Part 2: PCI express-based systems](https://resources.infosecinstitute.com/topic/system-address-map-initialization-x86x64-architecture-part-2-pci-express-based-systems/)
  19   * [PCIe elastic buffer](https://www.mindshare.com/files/resources/mindshare_pcie_elastic_buffer.pdf)
  20 * [Boot Guard and PSB have user-hostile defaults](https://mjg59.dreamwidth.org/58424.html)
  21
  22
  23 ## General Information
  24
  25 * [OS Dev](https://wiki.osdev.org/Categorized_Main_Page)
  26 * [Interface BUS](http://www.interfacebus.com/)
  27
  28 ## OpenSecurityTraining2
  29
  30 OpenSecurityTraining2 is dedicated to sharing training material for any topic
  31 related to computer security, including coreboot.
  32
  33 There are various ways to learn firmware, some are more efficient than others,
  34 depending on the people. Before going straight to practice and experimenting
  35 with hardware, it can be beneficial to learn the basics of computing. OST2
  36 focuses on conveying computer architecture and security information in the form
  37 of structured instructor-led classes, available to everyone for free.
  38
  39 All material is licensed [CC BY-SA 4.0](http://creativecommons.org/licenses/by-sa/4.0/),
  40 allowing anyone to use the material however they see fit, so long as they share
  41 modified works back to the community.
  42
  43 Below is a list of currently available courses that can help understand the
  44 inner workings of coreboot and other firmware-related topics:
  45
  46 * [coreboot design principles and boot process](https://ost2.fyi/Arch4031)
  47 * [x86-64 Assembly](https://ost2.fyi/Arch1001)
  48 * [x86-64 OS Internals](https://ost2.fyi/Arch2001)
  49 * [x86-64 Intel Firmware Attack & Defense](https://ost2.fyi/Arch4001)
  50
  51 There are [additional security courses](https://p.ost2.fyi/courses) at the site
  52 as well (such as
  53 [how to avoid writing exploitable code in C/C++](https://ost2.fyi/Vulns1001).)
  54
  55 ## Firmware Specifications & Information
  56
  57 * [System Management BIOS - SMBIOS](https://www.dmtf.org/standards/smbios)
  58 * [Desktop and Mobile Architecture for System Hardware - DASH](https://www.dmtf.org/standards/dash)
  59 * [PNP BIOS](https://www.intel.com/content/dam/support/us/en/documents/motherboards/desktop/sb/pnpbiosspecificationv10a.pdf)
  60
  61
  62 ### ACPI
  63
  64 * [ACPI Specs](https://uefi.org/acpi/specs)
  65 * [ACPI in Linux](https://www.kernel.org/doc/ols/2005/ols2005v1-pages-59-76.pdf)
  66 * [ACPI 5 Linux](https://blog.linuxplumbersconf.org/2012/wp-content/uploads/2012/09/LPC2012-ACPI5.pdf)
  67 * [ACPI 6 Linux](https://events.static.linuxfound.org/sites/events/files/slides/ACPI_6_and_Linux_0.pdf)
  68
  69
  70 ### Security
  71
  72 * [Intel Boot Guard](https://edk2-docs.gitbook.io/understanding-the-uefi-secure-boot-chain/secure_boot_chain_in_uefi/intel_boot_guard)
  73
  74
  75 ## Hardware information
  76
  77 * [WikiChip](https://en.wikichip.org/wiki/WikiChip)
  78 * [Sandpile](https://www.sandpile.org/)
  79 * [CPU-World](https://www.cpu-world.com/index.html)
  80 * [CPU-Upgrade](https://www.cpu-upgrade.com/index.html)
  81
  82
  83 ### Hardware Specifications & Standards
  84
  85 * [Bluetooth](https://www.bluetooth.com/specifications/specs/) - Bluetooth SIG
  86 * [eMMC](https://www.jedec.org/)  - JEDEC - (LOGIN REQUIRED)
  87 * [eSPI](https://cdrdv2.intel.com/v1/dl/getContent/645987) - Intel
  88 * [I2c Spec](https://web.archive.org/web/20170704151406/https://www.nxp.com/docs/en/user-guide/UM10204.pdf),
  89   [Appnote](https://www.nxp.com/docs/en/application-note/AN10216.pdf) - NXP
  90 * [I2S](https://www.nxp.com/docs/en/user-manual/UM11732.pdf) - NXP
  91 * [I3C](https://www.mipi.org/specifications/i3c-sensor-specification) - MIPI Alliance (LOGIN REQUIRED)
  92 * [Memory](https://www.jedec.org/)  - JEDEC - (LOGIN REQUIRED)
  93 * [NVMe](https://nvmexpress.org/developers/) - NVMe Specifications
  94 * [LPC](https://www.intel.com/content/dam/www/program/design/us/en/documents/low-pin-count-interface-specification.pdf) - Intel
  95 * [PCI / PCIe / M.2](https://pcisig.com/specifications) -  PCI-SIG - (LOGIN REQUIRED)
  96 * [Power Delivery](https://www.usb.org/documents) - USB Implementers Forum
  97 * [SATA](https://sata-io.org/developers/purchase-specification) - SATA-IO (LOGIN REQUIRED)
  98 * [SMBus](http://www.smbus.org/specs/) - System Management Interface Forum
  99 * [Smart Battery](http://smartbattery.org/specs/) - Smart Battery System Implementers Forum
 100 * [USB](https://www.usb.org/documents) - USB Implementers Forum
 101 * [WI-FI](https://www.wi-fi.org/discover-wi-fi/specifications) - Wi-Fi Alliance
 102
 103
 104 ### Chip Vendor Documentation
 105
 106 * AMD
 107   * [Developer Guides, Manuals & ISA Documents](https://developer.amd.com/resources/developer-guides-manuals/)
 108   * [AMD Tech Docs - Official Documentation Page](https://www.amd.com/en/support/tech-docs)
 109 * ARM
 110   * [Tools and Software - Specifications](https://developer.arm.com/tools-and-software/software-development-tools/specifications)
 111 * Intel
 112   * [Developer Zone](https://www.intel.com/content/www/us/en/developer/overview.html)
 113   * [Resource & Documentation Center](https://www.intel.com/content/www/us/en/resources-documentation/developer.html)
 114   * [Architecture Software Developer Manuals](https://www.intel.com/content/www/us/en/developer/articles/technical/intel-sdm.html)
 115   * [Intel specific ACPI](https://www.intel.com/content/www/us/en/standards/processor-vendor-specific-acpi-specification.html)
 116   * [coreboot on Eagle Stream](https://www.intel.com/content/www/us/en/content-details/778593/coreboot-practice-on-eagle-stream.html)
 117
 118 * Rockchip
 119   * [Open Source Wiki](https://opensource.rock-chips.com/wiki_Main_Page)
 120
 121
 122 ## Software
 123
 124  * [Fiedka](https://github.com/fiedka/fiedka) - A graphical Firmware Editor
 125  * [IOTools](https://github.com/adurbin/iotools) - Command line tools to access hardware registers
 126  * [UEFITool](https://github.com/LongSoft/UEFITool) - Editor for UEFI PI compliant firmware images
 127  * [CHIPSEC](https://chipsec.github.io) - Framework for analyzing platform level security & configuration
 128  * [SPDEditor](https://github.com/integralfx/SPDEditor) - GUI to edit DDR3 SPD files
 129  * [DDR4XMPEditor](https://github.com/integralfx/DDR4XMPEditor) - Editor for DDR4 SPD and XMP
 130 * [overclockSPD](https://github.com/baboomerang/overclockSPD) - Fast and easy way to read and write data to RAM SPDs.
 131 * [VBiosFinder](https://github.com/coderobe/VBiosFinder) - This tool attempts to extract a VBIOS from a BIOS update.
 132
 133
 134 ## Infrastructure software
 135
 136 * [Kconfig](https://www.kernel.org/doc/html/latest/kbuild/kconfig-language.html)
 137 * [GNU Make](https://www.gnu.org/software/make/manual/)