util/marvell/doimage_mv/bootstrap_def.h

   1 /*******************************************************************************
   2 Copyright (C) Marvell International Ltd. and its affiliates
   3
   4 Marvell GPL License Option
   5
   6 If you received this File from Marvell, you may opt to use, redistribute and/or
   7 modify this File in accordance with the terms and conditions of the General
   8 Public License Version 2, June 1991 (the "GPL License"), a copy of which is
   9 available along with the File in the license.txt file or by writing to the Free
  10 Software Foundation, Inc.
  11
  12 THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE IMPLIED
  13 WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY
  14 DISCLAIMED.  The GPL License provides additional details about this warranty
  15 disclaimer.
  16
  17 *******************************************************************************/
  18
  19 #ifndef _INC_BOOTSTRAP__DEF_H
  20 #define _INC_BOOTSTRAP__DEF_H
  21 #include "bootstrap_os.h"
  22
  23 #ifndef MV_ASMLANGUAGE
  24
  25 #define MAIN_HDR_VERSION 1
  26
  27 #define MAIN_HDR_NAND_SLC 0
  28 #define MAIN_HDR_NAND_MLC 1
  29
  30 typedef struct BHR_t {
  31         /*      type        name                byte order */
  32         MV_U8 blockID;          /*   0   */
  33         MV_U8 flags;            /*   1   */
  34         MV_U16 nandPageSize;    /*  2-3  */
  35         MV_U32 blockSize;       /*  4-7  */
  36         MV_U8 version;          /*   8   */
  37         MV_U8 hdrSizeMsb;       /*   9   */
  38         MV_U16 hdrSizeLsb;      /* 10-11 */
  39         MV_U32 sourceAddr;      /* 12-15 */
  40         MV_U32 destinationAddr; /* 16-19 */
  41         MV_U32 executionAddr;   /* 20-23 */
  42         MV_U8 options;          /*   24  */
  43         MV_U8 nandBlockSize;    /*   25  */
  44         MV_U8 nandTechnology;   /*   26  */
  45         MV_U8 rsvd4;            /*   27  */
  46         MV_U16 rsvd2;           /* 28-29 */
  47         MV_U8 ext;              /*   30  */
  48         MV_U8 checkSum;         /*   31  */
  49
  50 } BHR_t, *pBHR_t;
  51
  52 #define MAIN_HDR_GET_LEN(pHdr)                                                 \
  53         (((MV_U32)((pHdr)->hdrSizeMsb) << 16) | ((MV_U32)((pHdr)->hdrSizeLsb)))
  54
  55 #define EXT_HDR_TYP_SECURITY 0x01
  56 #define EXT_HDR_TYP_BINARY 0x02
  57 #define EXT_HDR_TYP_REGISTER 0x03
  58
  59 typedef struct headExtBHR_t {/* Common extension header head */
  60                              //  type        name        byte order
  61         MV_U8 type;
  62         MV_U8 lenMsb;
  63         MV_U16 lenLsb;
  64
  65 } headExtBHR_t;
  66
  67 #define EXT_HDR_SET_LEN(pHead, len)                                            \
  68         do {                                                                   \
  69                 (pHead)->lenMsb = ((len)&0x00FF0000) >> 16;                    \
  70                 (pHead)->lenLsb = (len)&0x0000FFFF;                            \
  71         } while (0)
  72
  73 #define EXT_HDR_GET_LEN(pHead)                                                 \
  74         (((MV_U32)((pHead)->lenMsb) << 16) | ((pHead)->lenLsb))
  75
  76 typedef struct tailExtBHR_t {/* Common extension header tail */
  77                              // type        name        byte order
  78         MV_U8 nextHdr;
  79         MV_U8 delay;
  80         MV_U16 rsvd2;
  81
  82 } tailExtBHR_t;
  83
  84 typedef struct publicKey_t {/* public key*/
  85         MV_U8 Key[524];
  86 } publicKey_t;
  87
  88 #define RSA_MAX_KEY_LEN_BYTES 256
  89
  90 typedef struct secExtBHR_t {
  91         headExtBHR_t head;
  92         MV_U8 encrypt;
  93         MV_U8 rsrvd0;
  94         MV_U16 rsrvd1;
  95         publicKey_t pubKey;
  96         MV_U8 jtagEn;
  97         MV_U8 rsrvd2;
  98         MV_U16 rsrvd3;
  99         MV_U32 boxId;
 100         MV_U32 flashId;
 101         MV_U8 hdrSign[256];
 102         MV_U8 imgSign[256];
 103         publicKey_t cskArray[16];
 104         MV_U8 cskBlockSign[256];
 105         tailExtBHR_t tail;
 106
 107 } secExtBHR_t, *pSecExtBHR_T;
 108
 109 /***********************/
 110 /* SECURE PARAMS       */
 111 /***********************/
 112 #define CSK_BLOCK_OFFSET 0x420
 113 #define PUB_KEY_SIZE 524
 114 #define CSK_KEY_NUM 16
 115 #define CSK_BLOCK_SIGN_OFFSET (CSK_BLOCK_OFFSET + (PUB_KEY_SIZE * CSK_KEY_NUM))
 116 /* 16 keys + 256 bytes long signature */
 117 #define CSK_BLOCK_SIZE ((PUB_KEY_SIZE * CSK_KEY_NUM) + 0x100)
 118
 119 #define BOOTROM_SIZE (64 * 1024)
 120 #define EXT_HDR_BASE_SIZE (sizeof(headExtBHR_t) + sizeof(tailExtBHR_t))
 121 /* MAX size of entire headers block */
 122 #define MAX_HEADER_SIZE (192 * 1024)
 123 #define MAX_TWSI_HDR_SIZE                                                      \
 124         (60 * 1024) /* MAX eeprom is 64K & leave 4K for image and header */
 125
 126 /* Boot Type - block ID */
 127 #define IBR_HDR_I2C_ID 0x4D
 128 #define IBR_HDR_SPI_ID 0x5A
 129 #define IBR_HDR_NAND_ID 0x8B
 130 #define IBR_HDR_SATA_ID 0x78
 131 #define IBR_HDR_PEX_ID 0x9C
 132 #define IBR_HDR_MMC_ID 0xAE
 133 #define IBR_HDR_UART_ID 0x69
 134 #define IBR_DEF_ATTRIB 0x00
 135
 136 /* ROM flags */
 137 #define BHR_FLAG_PRINT_EN 0x01
 138 #define BHR_FLAG_RESERVED1 0x02
 139 #define BHR_FLAG_RESERVED2 0x04
 140 #define BHR_FLAG_RESERVED3 0x08
 141 #define BHR_FLAG_RESERVED4 0x10
 142 #define BHR_FLAG_RESERVED5 0x20
 143 #define BHR_FLAG_RESERVED6 0x40
 144 #define BHR_FLAG_RESERVED7 0x80
 145
 146 /* ROM options */
 147 #define BHR_OPT_BAUDRATE_OFFS 0x0
 148 #define BHR_OPT_BAUDRATE_MASK (0x7 << BHR_OPT_BAUDRATE_OFFS)
 149 #define BHR_OPT_BAUD_DEFAULT (0x0 << BHR_OPT_BAUDRATE_OFFS)
 150 #define BHR_OPT_BAUD_2400 (0x1 << BHR_OPT_BAUDRATE_OFFS)
 151 #define BHR_OPT_BAUD_4800 (0x2 << BHR_OPT_BAUDRATE_OFFS)
 152 #define BHR_OPT_BAUD_9600 (0x3 << BHR_OPT_BAUDRATE_OFFS)
 153 #define BHR_OPT_BAUD_19200 (0x4 << BHR_OPT_BAUDRATE_OFFS)
 154 #define BHR_OPT_BAUD_38400 (0x5 << BHR_OPT_BAUDRATE_OFFS)
 155 #define BHR_OPT_BAUD_57600 (0x6 << BHR_OPT_BAUDRATE_OFFS)
 156 #define BHR_OPT_BAUD_115200 (0x7 << BHR_OPT_BAUDRATE_OFFS)
 157
 158 #define BHR_OPT_UART_PORT_OFFS 0x3
 159 #define BHR_OPT_UART_PORT_MASK (0x3 << BHR_OPT_UART_PORT_OFFS)
 160
 161 #define BHR_OPT_UART_MPPS_OFFS 0x5
 162 #define BHR_OPT_UART_MPPS_MASK (0x7 << BHR_OPT_UART_MPPS_OFFS)
 163
 164 typedef struct _mvCpuArmClk {
 165         MV_U32 cpuClk; /* CPU clock MHz */
 166         MV_U32 ddrClk; /* DDR clock MHz */
 167         MV_U32 l2cClk; /* L2 cache clock MHz */
 168 } MV_CPU_ARM_CLK;
 169
 170 #endif /* MV_ASMLANGUAGE */
 171 #endif /* _INC_BOOTSTRAP_H */