src/include/device/pci_mmio_cfg.h

   1 /* SPDX-License-Identifier: GPL-2.0-only */
   2
   3 #ifndef _PCI_MMIO_CFG_H
   4 #define _PCI_MMIO_CFG_H
   5
   6 #include <stdint.h>
   7 #include <device/mmio.h>
   8 #include <device/pci_type.h>
   9
  10 /* Using a unique datatype for MMIO writes makes the pointers to _not_
  11  * qualify for pointer aliasing with any other objects in memory.
  12  *
  13  * MMIO offset is a value originally derived from 'struct device *'
  14  * in ramstage. For the compiler to not discard this MMIO offset value
  15  * from CPU registers after any MMIO writes, -fstrict-aliasing has to
  16  * be also set for the build.
  17  *
  18  * Bottom 12 bits (4 KiB) are reserved to address the registers of a
  19  * single PCI function. Declare the bank as a union to avoid some casting
  20  * in the functions below.
  21  */
  22 union pci_bank {
  23         uint8_t reg8[4096];
  24         uint16_t reg16[4096 / sizeof(uint16_t)];
  25         uint32_t reg32[4096 / sizeof(uint32_t)];
  26 };
  27
  28 #if CONFIG(ECAM_MMCONF_SUPPORT)
  29
  30 #if CONFIG_ECAM_MMCONF_BASE_ADDRESS == 0
  31 #error "CONFIG_ECAM_MMCONF_BASE_ADDRESS undefined!"
  32 #endif
  33
  34 #if CONFIG_ECAM_MMCONF_BUS_NUMBER == 0
  35 #error "CONFIG_ECAM_MMCONF_BUS_NUMBER is undefined!"
  36 #endif
  37
  38 #if CONFIG_ECAM_MMCONF_BUS_NUMBER * MiB != CONFIG_ECAM_MMCONF_LENGTH
  39 #error "CONFIG_ECAM_MMCONF_LENGTH does not correspond with CONFIG_ECAM_MMCONF_BUS_NUMBER!"
  40 #endif
  41
  42 /* By not assigning this to CONFIG_ECAM_MMCONF_BASE_ADDRESS here we
  43    prevent some sub-optimal constant folding. */
  44 extern u8 *const pci_mmconf;
  45
  46 static __always_inline
  47 volatile union pci_bank *pci_map_bus(pci_devfn_t dev)
  48 {
  49         return (void *)&pci_mmconf[PCI_DEVFN_OFFSET(dev)];
  50 }
  51
  52 #else
  53
  54 /* For platforms not supporting ECAM, they need to define pci_map_bus function
  55  * in their platform-specific code */
  56 volatile union pci_bank *pci_map_bus(pci_devfn_t dev);
  57
  58 #endif
  59
  60 /*
  61  * Avoid name collisions as different stages have different signature
  62  * for these functions. The _s_ stands for simple, fundamental IO or
  63  * MMIO variant.
  64  */
  65
  66 static __always_inline
  67 uint8_t pci_s_read_config8(pci_devfn_t dev, uint16_t reg)
  68 {
  69         return pci_map_bus(dev)->reg8[reg];
  70 }
  71
  72 static __always_inline
  73 uint16_t pci_s_read_config16(pci_devfn_t dev, uint16_t reg)
  74 {
  75         return pci_map_bus(dev)->reg16[reg / sizeof(uint16_t)];
  76 }
  77
  78 static __always_inline
  79 uint32_t pci_s_read_config32(pci_devfn_t dev, uint16_t reg)
  80 {
  81         return pci_map_bus(dev)->reg32[reg / sizeof(uint32_t)];
  82 }
  83
  84 static __always_inline
  85 void pci_s_write_config8(pci_devfn_t dev, uint16_t reg, uint8_t value)
  86 {
  87         pci_map_bus(dev)->reg8[reg] = value;
  88 }
  89
  90 static __always_inline
  91 void pci_s_write_config16(pci_devfn_t dev, uint16_t reg, uint16_t value)
  92 {
  93         pci_map_bus(dev)->reg16[reg / sizeof(uint16_t)] = value;
  94 }
  95
  96 static __always_inline
  97 void pci_s_write_config32(pci_devfn_t dev, uint16_t reg, uint32_t value)
  98 {
  99         pci_map_bus(dev)->reg32[reg / sizeof(uint32_t)] = value;
 100 }
 101
 102 /*
 103  * The functions pci_mmio_config*_addr provide a way to determine the MMIO address of a PCI
 104  * config register. The address returned is dependent of both the MMCONF base address and the
 105  * assigned PCI bus number of the requested device, which both can change during the boot
 106  * process. Thus, the pointer returned here must not be cached!
 107  */
 108 static __always_inline
 109 uint8_t *pci_mmio_config8_addr(pci_devfn_t dev, uint16_t reg)
 110 {
 111         return (uint8_t *)&pci_map_bus(dev)->reg8[reg];
 112 }
 113
 114 static __always_inline
 115 uint16_t *pci_mmio_config16_addr(pci_devfn_t dev, uint16_t reg)
 116 {
 117         return (uint16_t *)&pci_map_bus(dev)->reg16[reg / sizeof(uint16_t)];
 118 }
 119
 120 static __always_inline
 121 uint32_t *pci_mmio_config32_addr(pci_devfn_t dev, uint16_t reg)
 122 {
 123         return (uint32_t *)&pci_map_bus(dev)->reg32[reg / sizeof(uint32_t)];
 124 }
 125
 126 #endif /* _PCI_MMIO_CFG_H */