1 ## SPDX
-License
-Identifier
: GPL
-2.0-or-later
3 chip northbridge
/intel
/sandybridge
4 register
"spd_addresses" = "{0x50, 0, 0x52, 0}"
8 register
"gfx" = "GMA_STATIC_DISPLAYS(1)"
9 register
"gpu_dp_b_hotplug" = "4"
10 register
"gpu_dp_c_hotplug" = "4"
11 register
"gpu_dp_d_hotplug" = "4"
12 register
"gpu_panel_port_select" = "0"
13 register
"gpu_panel_power_backlight_off_delay" = "2300"
14 register
"gpu_panel_power_backlight_on_delay" = "2300"
15 register
"gpu_panel_power_cycle_delay" = "6"
16 register
"gpu_panel_power_down_delay" = "400"
17 register
"gpu_panel_power_up_delay" = "400"
20 chip southbridge
/intel
/bd82x6x # Intel
6/7 Series PCH
21 register
"docking_supported" = "1"
23 register
"gpi0_routing" = "2"
24 register
"pcie_hotplug_map" = "{ 0, 0, 1, 1, 0, 0, 0, 0 }"
25 register
"pcie_port_coalesce" = "1"
27 register
"spi_lvscc" = "0x2005"
28 register
"spi_uvscc" = "0x2005"
31 device ref ehci2 on
end
33 device ref pcie_rp1 on
end # WWAN Slot
34 device ref pcie_rp2 on
end # SLAN Slot
35 device ref pcie_rp3 on
end # ExpressCard
36 device ref pcie_rp4 on
end # E
-Module
(optical bay
)
37 device ref pcie_rp5 on
end # Extra Half Mini PCIe slot
38 device ref pcie_rp6 on
end # SD
/MMC Card Reader
39 device ref ehci1 on
end
41 register
"gen1_dec" = "0x007c0681"
42 register
"gen2_dec" = "0x005c0921"
43 register
"gen3_dec" = "0x003c07e1"
44 register
"gen4_dec" = "0x00000911" # Ports
0x910/0x911 for EC
47 device pnp ff
.0 on
end
51 register
"sata_interface_speed_support" = "0x3"
52 register
"sata_port_map" = "0x33"