mainboard/intel/avenuecity_crb: Update full IIO configuration
[coreboot2.git] / src / mainboard / google / cherry / bootblock.c
blob39d5aa093e4556b0e5268afcd6cff5f2f819771e
1 /* SPDX-License-Identifier: GPL-2.0-only */
3 #include <bootblock_common.h>
4 #include <device/mmio.h>
5 #include <gpio.h>
6 #include <soc/i2c.h>
7 #include <soc/pcie.h>
8 #include <soc/spi.h>
10 #include "gpio.h"
12 static void nor_set_gpio_pinmux(void)
14 const struct pad_func *ptr = NULL;
16 /* GPIO 140 ~ 143 */
17 struct pad_func nor_pinmux[] = {
18 PAD_FUNC_UP(SPIM2_CSB, SPINOR_CS),
19 PAD_FUNC_UP(SPIM2_CLK, SPINOR_CK),
20 PAD_FUNC_UP(SPIM2_MO, SPINOR_IO0),
21 PAD_FUNC_UP(SPIM2_MI, SPINOR_IO1),
24 ptr = nor_pinmux;
25 for (size_t i = 0; i < ARRAY_SIZE(nor_pinmux); i++) {
26 gpio_set_pull(ptr[i].gpio, GPIO_PULL_ENABLE, ptr[i].select);
27 gpio_set_mode(ptr[i].gpio, ptr[i].func);
31 static void usb3_hub_reset(void)
33 gpio_output(GPIO(DGI_D7), 1);
36 void bootblock_mainboard_init(void)
39 * Initialize PCIe pinmux and assert PERST# early to reduce
40 * the impact of 100ms delay.
42 if (CONFIG(PCI))
43 mtk_pcie_pre_init();
45 mtk_i2c_bus_init(CONFIG_DRIVER_TPM_I2C_BUS, I2C_SPEED_FAST);
46 mtk_spi_init(CONFIG_EC_GOOGLE_CHROMEEC_SPI_BUS, SPI_PAD0_MASK, 3 * MHz, 0);
47 nor_set_gpio_pinmux();
48 setup_chromeos_gpios();
49 gpio_eint_configure(GPIO_GSC_AP_INT, IRQ_TYPE_EDGE_RISING);
50 usb3_hub_reset();